Commit 21295368 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge branch '4.0-rc1-prcm-cleanup-v6' of https://github.com/t-kristo/linux-pm... 

Merge branch '4.0-rc1-prcm-cleanup-v6' of https://github.com/t-kristo/linux-pm into omap-for-v4.1/prcm-cleanup

Conflicts:
	arch/arm/boot/dts/dra7.dtsi
parents 209431ef ca125b5e

Documentation/devicetree/bindings/arm/omap/ctrl.txt

0 → 100644
+79 −0
Original line number Diff line number Diff line 
OMAP Control Module bindings



Control Module contains miscellaneous features under it based on SoC type.

Pincontrol is one common feature, and it has a specialized support

described in [1]. Typically some clock nodes are also under control module.

Syscon is used to share register level access to drivers external to

control module driver itself.



See [2] for documentation about clock/clockdomain nodes.



[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt

[2] Documentation/devicetree/bindings/clock/ti/*



Required properties:

- compatible:	Must be one of:

		"ti,am3-scm"

		"ti,am4-scm"

		"ti,dm814-scrm"

		"ti,dm816-scrm"

		"ti,omap2-scm"

		"ti,omap3-scm"

		"ti,omap4-scm-core"

		"ti,omap4-scm-padconf-core"

		"ti,omap5-scm-core"

		"ti,omap5-scm-padconf-core"

		"ti,dra7-scm-core"

- reg:		Contains Control Module register address range

		(base address and length)



Optional properties:

- clocks:	clocks for this module

- clockdomains:	clockdomains for this module



Examples:



scm: scm@2000 {

	compatible = "ti,omap3-scm", "simple-bus";

	reg = <0x2000 0x2000>;

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0 0x2000 0x2000>;



	omap3_pmx_core: pinmux@30 {

		compatible = "ti,omap3-padconf",

			     "pinctrl-single";

		reg = <0x30 0x230>;

		#address-cells = <1>;

		#size-cells = <0>;

		#interrupt-cells = <1>;

		interrupt-controller;

		pinctrl-single,register-width = <16>;

		pinctrl-single,function-mask = <0xff1f>;

	};



	scm_conf: scm_conf@270 {

		compatible = "syscon";

		reg = <0x270 0x330>;

		#address-cells = <1>;

		#size-cells = <1>;



		scm_clocks: clocks {

			#address-cells = <1>;

			#size-cells = <0>;

		};

	};



	scm_clockdomains: clockdomains {

	};

}



&scm_clocks {

	mcbsp5_mux_fck: mcbsp5_mux_fck {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&core_96m_fck>, <&mcbsp_clks>;

		ti,bit-shift = <4>;

		reg = <0x02d8>;

	};

};

Documentation/devicetree/bindings/arm/omap/l4.txt

0 → 100644
+26 −0
Original line number Diff line number Diff line 
L4 interconnect bindings



These bindings describe the OMAP SoCs L4 interconnect bus.



Required properties:

- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus

	       Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus

	       Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus

	       Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus

	       Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus

	       Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus

	       Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus

	       Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus

	       Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus

	       Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus

	       Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus

- ranges : contains the IO map range for the bus



Examples:



l4: l4@48000000 {

	compatible "ti,omap2-l4", "simple-bus";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0 0x48000000 0x100000>;

};

Documentation/devicetree/bindings/arm/omap/prcm.txt

+2 −4
Original line number Diff line number Diff line
@@ -10,14 +10,10 @@ documentation about the individual clock/clockdomain nodes. 
Required properties:

- compatible:	Must be one of:

		"ti,am3-prcm"

		"ti,am3-scrm"

		"ti,am4-prcm"

		"ti,am4-scrm"

		"ti,omap2-prcm"

		"ti,omap2-scrm"

		"ti,omap3-prm"

		"ti,omap3-cm"

		"ti,omap3-scrm"

		"ti,omap4-cm1"

		"ti,omap4-prm"

		"ti,omap4-cm2"
@@ -29,6 +25,8 @@ Required properties: 
		"ti,dra7-prm"

		"ti,dra7-cm-core-aon"

		"ti,dra7-cm-core"

		"ti,dm814-prcm"

		"ti,dm816-prcm"

- reg:		Contains PRCM module register address range

		(base address and length)

- clocks:	clocks for this module

arch/arm/boot/dts/am33xx-clocks.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

&scrm_clocks {

&scm_clocks {

	sys_clkin_ck: sys_clkin_ck {

		#clock-cells = <0>;

		compatible = "ti,mux-clock";

arch/arm/boot/dts/am33xx.dtsi

+47 −40
Original line number Diff line number Diff line
@@ -83,20 +83,6 @@ 
		};

	};



	am33xx_control_module: control_module@4a002000 {

		compatible = "syscon";

		reg = <0x44e10000 0x7fc>;

	};



	am33xx_pinmux: pinmux@44e10800 {

		compatible = "pinctrl-single";

		reg = <0x44e10800 0x0238>;

		#address-cells = <1>;

		#size-cells = <0>;

		pinctrl-single,register-width = <32>;

		pinctrl-single,function-mask = <0x7f>;

	};



	/*

	 * XXX: Use a flat representation of the AM33XX interconnect.

	 * The real AM33XX interconnect network is quite complex. Since
@@ -111,9 +97,15 @@ 
		ranges;

		ti,hwmods = "l3_main";



		prcm: prcm@44e00000 {

		l4_wkup: l4_wkup@44c00000 {

			compatible = "ti,am3-l4-wkup", "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x44c00000 0x280000>;



			prcm: prcm@200000 {

				compatible = "ti,am3-prcm";

			reg = <0x44e00000 0x4000>;

				reg = <0x200000 0x4000>;



				prcm_clocks: clocks {

					#address-cells = <1>;
@@ -124,22 +116,37 @@ 
				};

			};



		scrm: scrm@44e10000 {

			compatible = "ti,am3-scrm";

			reg = <0x44e10000 0x2000>;

			scm: scm@210000 {

				compatible = "ti,am3-scm", "simple-bus";

				reg = <0x210000 0x2000>;

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x210000 0x2000>;



			scrm_clocks: clocks {

				am33xx_pinmux: pinmux@800 {

					compatible = "pinctrl-single";

					reg = <0x800 0x238>;

					#address-cells = <1>;

					#size-cells = <0>;

					pinctrl-single,register-width = <32>;

					pinctrl-single,function-mask = <0x7f>;

				};



			scrm_clockdomains: clockdomains {

				scm_conf: scm_conf@0 {

					compatible = "syscon";

					reg = <0x0 0x800>;

					#address-cells = <1>;

					#size-cells = <1>;



					scm_clocks: clocks {

						#address-cells = <1>;

						#size-cells = <0>;

					};

				};



		cm: syscon@44e10000 {

			compatible = "ti,am33xx-controlmodule", "syscon";

			reg = <0x44e10000 0x800>;

				scm_clockdomains: clockdomains {

				};

			};

		};



		intc: interrupt-controller@48200000 {
@@ -350,7 +357,7 @@ 
			reg = <0x481cc000 0x2000>;

			clocks = <&dcan0_fck>;

			clock-names = "fck";

			syscon-raminit = <&am33xx_control_module 0x644 0>;

			syscon-raminit = <&scm_conf 0x644 0>;

			interrupts = <52>;

			status = "disabled";

		};
@@ -361,7 +368,7 @@ 
			reg = <0x481d0000 0x2000>;

			clocks = <&dcan1_fck>;

			clock-names = "fck";

			syscon-raminit = <&am33xx_control_module 0x644 1>;

			syscon-raminit = <&scm_conf 0x644 1>;

			interrupts = <55>;

			status = "disabled";

		};
@@ -720,7 +727,7 @@ 
			 */

			interrupts = <40 41 42 43>;

			ranges;

			syscon = <&cm>;

			syscon = <&scm_conf>;

			status = "disabled";



			davinci_mdio: mdio@4a101000 {

CRA Git | Maintained and supported by SUSTech CRA and CCSE