Commit 20d00c40 authored by Sudeep Holla's avatar Sudeep Holla
Browse files

arm64: dts: juno/fast models: sort couple of device nodes



Sort the couple device nodes with unit addresses which are out of order.

Acked-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Signed-off-by: default avatarSudeep Holla <sudeep.holla@arm.com>
parent 88c2ccc0
Loading
Loading
Loading
Loading
+35 −35
Original line number Diff line number Diff line
@@ -220,6 +220,41 @@
		};
	};

	replicator@20120000 {
		compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
		reg = <0 0x20120000 0 0x1000>;

		clocks = <&soc_smc50mhz>;
		clock-names = "apb_pclk";
		power-domains = <&scpi_devpd 0>;

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			/* replicator output ports */
			port@0 {
				reg = <0>;
				replicator_out_port0: endpoint {
					remote-endpoint = <&tpiu_in_port>;
				};
			};

			port@1 {
				reg = <1>;
				replicator_out_port1: endpoint {
					remote-endpoint = <&etr_in_port>;
				};
			};
		};
		in-ports {
			port {
				replicator_in_port0: endpoint {
				};
			};
		};
	};

	cpu_debug0: cpu-debug@22010000 {
		compatible = "arm,coresight-cpu-debug", "arm,primecell";
		reg = <0x0 0x22010000 0x0 0x1000>;
@@ -452,41 +487,6 @@
		};
	};

	replicator@20120000 {
		compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
		reg = <0 0x20120000 0 0x1000>;

		clocks = <&soc_smc50mhz>;
		clock-names = "apb_pclk";
		power-domains = <&scpi_devpd 0>;

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			/* replicator output ports */
			port@0 {
				reg = <0>;
				replicator_out_port0: endpoint {
					remote-endpoint = <&tpiu_in_port>;
				};
			};

			port@1 {
				reg = <1>;
				replicator_out_port1: endpoint {
					remote-endpoint = <&etr_in_port>;
				};
			};
		};
		in-ports {
			port {
				replicator_in_port0: endpoint {
				};
			};
		};
	};

	sram: sram@2e000000 {
		compatible = "arm,juno-sram-ns", "mmio-sram";
		reg = <0x0 0x2e000000 0x0 0x8000>;
+6 −6
Original line number Diff line number Diff line
@@ -167,6 +167,12 @@
					clock-names = "timclken1", "timclken2", "apb_pclk";
				};

				virtio-block@130000 {
					compatible = "virtio,mmio";
					reg = <0x130000 0x200>;
					interrupts = <42>;
				};

				rtc@170000 {
					compatible = "arm,pl031", "arm,primecell";
					reg = <0x170000 0x1000>;
@@ -193,12 +199,6 @@
						};
					};
				};

				virtio-block@130000 {
					compatible = "virtio,mmio";
					reg = <0x130000 0x200>;
					interrupts = <42>;
				};
			};

			v2m_fixed_3v3: v2m-3v3 {