Commit 201d355c authored May 21, 2019 by Anshuman Khandual Committed by Catalin Marinas Jun 03, 2019

arm64/mm: Move PTE_VALID from SW defined to HW page table entry definitions

PTE_VALID signifies that the last level page table entry is valid and it is
MMU recognized while walking the page table. This is not a software defined
PTE bit and should not be listed like one. Just move it to appropriate
header file.

Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Steve Capper <steve.capper@arm.com>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent 441a6278

arch/arm64/include/asm/pgtable-hwdef.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -153,6 +153,7 @@
		/*
		* Level 3 descriptor (PTE).
		*/
		#define PTE_VALID (_AT(pteval_t, 1) << 0)
		#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0)
		#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0)
		#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0)

arch/arm64/include/asm/pgtable-prot.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -24,7 +24,6 @@
		/*
		* Software defined PTE bits definition.
		*/
		#define PTE_VALID (_AT(pteval_t, 1) << 0)
		#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
		#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
		#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)

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