Commit 2006058e authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Move the renderstate setup under gt/



The render state is used to initialise the default RCS context, and only
used during early setup from within the gt code. As such, it makes a
good candidate for placing within gt/, even if it is not yet entirely
clean of our GEM heritage.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190704091925.7391-1-chris@chris-wilson.co.uk
parent 06861089
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+7 −7
Original line number Diff line number Diff line
@@ -78,12 +78,19 @@ gt-y += \
	gt/intel_gt_pm.o \
	gt/intel_hangcheck.o \
	gt/intel_lrc.o \
	gt/intel_renderstate.o \
	gt/intel_reset.o \
	gt/intel_ringbuffer.o \
	gt/intel_mocs.o \
	gt/intel_sseu.o \
	gt/intel_timeline.o \
	gt/intel_workarounds.o
# autogenerated null render state
gt-y += \
	gt/gen6_renderstate.o \
	gt/gen7_renderstate.o \
	gt/gen8_renderstate.o \
	gt/gen9_renderstate.o
gt-$(CONFIG_DRM_I915_SELFTEST) += \
	gt/mock_engine.o
i915-y += $(gt-y)
@@ -123,7 +130,6 @@ i915-y += \
	  i915_gem_fence_reg.o \
	  i915_gem_gtt.o \
	  i915_gem.o \
	  i915_gem_render_state.o \
	  i915_globals.o \
	  i915_query.o \
	  i915_request.o \
@@ -144,12 +150,6 @@ i915-y += intel_uc.o \
	  intel_huc.o \
	  intel_huc_fw.o

# autogenerated null render state
i915-y += intel_renderstate_gen6.o \
	  intel_renderstate_gen7.o \
	  intel_renderstate_gen8.o \
	  intel_renderstate_gen9.o

# modesetting core code
obj-y += display/
i915-y += \
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