Commit 1fd2bb6c authored by Jon Mason's avatar Jon Mason Committed by Florian Fainelli
Browse files

ARM: dts: NSP: DT Clean-ups 



The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in.  Move it to make it fit in properly.  Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files.  Move the relevant
peices to make it match.  Finally, remove errant new lines.

Signed-off-by: default avatarJon Mason <jon.mason@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent a503cf0c

arch/arm/boot/dts/bcm-nsp.dtsi

+23 −23
Original line number Diff line number Diff line
@@ -241,29 +241,6 @@ 
			brcm,nand-has-wp;

		};



		gpiob: gpio@30000 {

			compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";

			reg = <0x30000 0x50>;

			#gpio-cells = <2>;

			gpio-controller;

			ngpios = <4>;

			interrupt-controller;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

		};



		pwm: pwm@31000 {

			compatible = "brcm,iproc-pwm";

			reg = <0x31000 0x28>;

			clocks = <&osc>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		rng: rng@33000 {

			compatible = "brcm,bcm-nsp-rng";

			reg = <0x33000 0x14>;

		};



		qspi: qspi@27200 {

			compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";

			reg = <0x027200 0x184>,
@@ -293,6 +270,29 @@ 
			#size-cells = <0>;

		};



		gpiob: gpio@30000 {

			compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";

			reg = <0x30000 0x50>;

			#gpio-cells = <2>;

			gpio-controller;

			ngpios = <4>;

			interrupt-controller;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

		};



		pwm: pwm@31000 {

			compatible = "brcm,iproc-pwm";

			reg = <0x31000 0x28>;

			clocks = <&osc>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		rng: rng@33000 {

			compatible = "brcm,bcm-nsp-rng";

			reg = <0x33000 0x14>;

		};



		ccbtimer0: timer@34000 {

			compatible = "arm,sp804";

			reg = <0x34000 0x1000>;

arch/arm/boot/dts/bcm958522er.dts

+0 −1
Original line number Diff line number Diff line
@@ -65,7 +65,6 @@ 
	status = "okay";

};





&amac1 {

	status = "okay";

};

arch/arm/boot/dts/bcm958525er.dts

+0 −1
Original line number Diff line number Diff line
@@ -65,7 +65,6 @@ 
	status = "okay";

};





&amac1 {

	status = "okay";

};

arch/arm/boot/dts/bcm958525xmc.dts

+13 −13
Original line number Diff line number Diff line
@@ -59,6 +59,8 @@ 
	};

};



/* XHCI, MMC, and Ethernet support needed to be complete */



&i2c0 {

	temperature-sensor@4c {

		compatible = "adi,adt7461a";
@@ -115,12 +117,6 @@ 
	};

};



/* XHCI, MMC, and Ethernet support needed to be complete */



&uart0 {

	status = "okay";

};



&pcie0 {

	status = "okay";

};
@@ -129,6 +125,15 @@ 
	status = "okay";

};



&pinctrl {

	pinctrl-names = "default";

	pinctrl-0 = <&nand_sel>;

	nand_sel: nand_sel {

		function = "nand";

		groups = "nand_grp";

	};

};



&sata_phy0 {

	status = "okay";

};
@@ -141,11 +146,6 @@ 
	status = "okay";

};



&pinctrl {

	pinctrl-names = "default";

	pinctrl-0 = <&nand_sel>;

	nand_sel: nand_sel {

		function = "nand";

		groups = "nand_grp";

	};

&uart0 {

	status = "okay";

};

arch/arm/boot/dts/bcm958623hr.dts

+8 −8
Original line number Diff line number Diff line
@@ -120,6 +120,14 @@ 
	};

};



&sata_phy0 {

	status = "okay";

};



&sata {

	status = "okay";

};



&srab {

	compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";

	status = "okay";
@@ -165,14 +173,6 @@ 
	};

};



&sata_phy0 {

	status = "okay";

};



&sata {

	status = "okay";

};



&uart0 {

	status = "okay";

};

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