Commit 1e8518aa authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.21-rockchip-drivers-1' of...

Merge tag 'v4.21-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Powerdomain support for rk3066 and rk3188.

* tag 'v4.21-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  soc: rockchip: power-domain: add rk3066 powerdomains
  soc: rockchip: power-domain: add rk3188 powerdomains
  dt-bindings: add compatibles for rk3066/rk3188 power controllers
  dt-bindings: add power-domain header for RK3066 SoCs
  dt-bindings: add power-domain header for RK3188 SoCs

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents ccda4af0 24869610
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -7,7 +7,9 @@ Required properties for power domain controller:
- compatible: Should be one of the following.
	"rockchip,px30-power-controller" - for PX30 SoCs.
	"rockchip,rk3036-power-controller" - for RK3036 SoCs.
	"rockchip,rk3066-power-controller" - for RK3066 SoCs.
	"rockchip,rk3128-power-controller" - for RK3128 SoCs.
	"rockchip,rk3188-power-controller" - for RK3188 SoCs.
	"rockchip,rk3228-power-controller" - for RK3228 SoCs.
	"rockchip,rk3288-power-controller" - for RK3288 SoCs.
	"rockchip,rk3328-power-controller" - for RK3328 SoCs.
@@ -23,7 +25,9 @@ Required properties for power domain sub nodes:
- reg: index of the power domain, should use macros in:
	"include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
	"include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain.
	"include/dt-bindings/power/rk3066-power.h" - for RK3066 type power domain.
	"include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain.
	"include/dt-bindings/power/rk3188-power.h" - for RK3188 type power domain.
	"include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain.
	"include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.
	"include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain.
+48 −0
Original line number Diff line number Diff line
@@ -21,7 +21,9 @@
#include <linux/mfd/syscon.h>
#include <dt-bindings/power/px30-power.h>
#include <dt-bindings/power/rk3036-power.h>
#include <dt-bindings/power/rk3066-power.h>
#include <dt-bindings/power/rk3128-power.h>
#include <dt-bindings/power/rk3188-power.h>
#include <dt-bindings/power/rk3228-power.h>
#include <dt-bindings/power/rk3288-power.h>
#include <dt-bindings/power/rk3328-power.h>
@@ -737,6 +739,14 @@ static const struct rockchip_domain_info rk3036_pm_domains[] = {
	[RK3036_PD_SYS]		= DOMAIN_RK3036(8, 22, 29, false),
};

static const struct rockchip_domain_info rk3066_pm_domains[] = {
	[RK3066_PD_GPU]		= DOMAIN(9, 9, 3, 24, 29, false),
	[RK3066_PD_VIDEO]	= DOMAIN(8, 8, 4, 23, 28, false),
	[RK3066_PD_VIO]		= DOMAIN(7, 7, 5, 22, 27, false),
	[RK3066_PD_PERI]	= DOMAIN(6, 6, 2, 25, 30, false),
	[RK3066_PD_CPU]		= DOMAIN(-1, 5, 1, 26, 31, false),
};

static const struct rockchip_domain_info rk3128_pm_domains[] = {
	[RK3128_PD_CORE]	= DOMAIN_RK3288(0, 0, 4, false),
	[RK3128_PD_MSCH]	= DOMAIN_RK3288(-1, -1, 6, true),
@@ -745,6 +755,14 @@ static const struct rockchip_domain_info rk3128_pm_domains[] = {
	[RK3128_PD_GPU]		= DOMAIN_RK3288(1, 1, 3, false),
};

static const struct rockchip_domain_info rk3188_pm_domains[] = {
	[RK3188_PD_GPU]		= DOMAIN(9, 9, 3, 24, 29, false),
	[RK3188_PD_VIDEO]	= DOMAIN(8, 8, 4, 23, 28, false),
	[RK3188_PD_VIO]		= DOMAIN(7, 7, 5, 22, 27, false),
	[RK3188_PD_PERI]	= DOMAIN(6, 6, 2, 25, 30, false),
	[RK3188_PD_CPU]		= DOMAIN(5, 5, 1, 26, 31, false),
};

static const struct rockchip_domain_info rk3228_pm_domains[] = {
	[RK3228_PD_CORE]	= DOMAIN_RK3036(0, 0, 16, true),
	[RK3228_PD_MSCH]	= DOMAIN_RK3036(1, 1, 17, true),
@@ -846,6 +864,17 @@ static const struct rockchip_pmu_info rk3036_pmu = {
	.domain_info = rk3036_pm_domains,
};

static const struct rockchip_pmu_info rk3066_pmu = {
	.pwr_offset = 0x08,
	.status_offset = 0x0c,
	.req_offset = 0x38, /* PMU_MISC_CON1 */
	.idle_offset = 0x0c,
	.ack_offset = 0x0c,

	.num_domains = ARRAY_SIZE(rk3066_pm_domains),
	.domain_info = rk3066_pm_domains,
};

static const struct rockchip_pmu_info rk3128_pmu = {
	.pwr_offset = 0x04,
	.status_offset = 0x08,
@@ -857,6 +886,17 @@ static const struct rockchip_pmu_info rk3128_pmu = {
	.domain_info = rk3128_pm_domains,
};

static const struct rockchip_pmu_info rk3188_pmu = {
	.pwr_offset = 0x08,
	.status_offset = 0x0c,
	.req_offset = 0x38, /* PMU_MISC_CON1 */
	.idle_offset = 0x0c,
	.ack_offset = 0x0c,

	.num_domains = ARRAY_SIZE(rk3188_pm_domains),
	.domain_info = rk3188_pm_domains,
};

static const struct rockchip_pmu_info rk3228_pmu = {
	.req_offset = 0x40c,
	.idle_offset = 0x488,
@@ -948,10 +988,18 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
		.compatible = "rockchip,rk3036-power-controller",
		.data = (void *)&rk3036_pmu,
	},
	{
		.compatible = "rockchip,rk3066-power-controller",
		.data = (void *)&rk3066_pmu,
	},
	{
		.compatible = "rockchip,rk3128-power-controller",
		.data = (void *)&rk3128_pmu,
	},
	{
		.compatible = "rockchip,rk3188-power-controller",
		.data = (void *)&rk3188_pmu,
	},
	{
		.compatible = "rockchip,rk3228-power-controller",
		.data = (void *)&rk3228_pmu,
+22 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_POWER_RK3066_POWER_H__
#define __DT_BINDINGS_POWER_RK3066_POWER_H__

/* VD_CORE */
#define RK3066_PD_A9_0		0
#define RK3066_PD_A9_1		1
#define RK3066_PD_DBG		4
#define RK3066_PD_SCU		5

/* VD_LOGIC */
#define RK3066_PD_VIDEO		6
#define RK3066_PD_VIO		7
#define RK3066_PD_GPU		8
#define RK3066_PD_PERI		9
#define RK3066_PD_CPU		10
#define RK3066_PD_ALIVE		11

/* VD_PMU */
#define RK3066_PD_RTC		12

#endif
+24 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_POWER_RK3188_POWER_H__
#define __DT_BINDINGS_POWER_RK3188_POWER_H__

/* VD_CORE */
#define RK3188_PD_A9_0		0
#define RK3188_PD_A9_1		1
#define RK3188_PD_A9_2		2
#define RK3188_PD_A9_3		3
#define RK3188_PD_DBG		4
#define RK3188_PD_SCU		5

/* VD_LOGIC */
#define RK3188_PD_VIDEO		6
#define RK3188_PD_VIO		7
#define RK3188_PD_GPU		8
#define RK3188_PD_PERI		9
#define RK3188_PD_CPU		10
#define RK3188_PD_ALIVE		11

/* VD_PMU */
#define RK3188_PD_RTC		12

#endif