Commit 1e6adfe5 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-5.7-2020-04-15' of... 

Merge tag 'amd-drm-fixes-5.7-2020-04-15' of git://people.freedesktop.org/~agd5f/linux

 into drm-fixes

amd-drm-fixes-5.7-2020-04-15:

amdgpu:
- gfx10 fix
- SMU7 overclocking fix
- RAS fix
- GPU reset fix
- Fix a regression in a previous s/r fix
- Add a gfxoff quirk

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200415221631.3924-1-alexander.deucher@amd.com
parents bbf4ee26 974229db

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+20 −2
Original line number Diff line number Diff line
@@ -2008,8 +2008,24 @@ static void amdgpu_device_fill_reset_magic(struct amdgpu_device *adev) 
 */

static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)

{

	return !!memcmp(adev->gart.ptr, adev->reset_magic,

			AMDGPU_RESET_MAGIC_NUM);

	if (memcmp(adev->gart.ptr, adev->reset_magic,

			AMDGPU_RESET_MAGIC_NUM))

		return true;



	if (!adev->in_gpu_reset)

		return false;



	/*

	 * For all ASICs with baco/mode1 reset, the VRAM is

	 * always assumed to be lost.

	 */

	switch (amdgpu_asic_reset_method(adev)) {

	case AMD_RESET_METHOD_BACO:

	case AMD_RESET_METHOD_MODE1:

		return true;

	default:

		return false;

	}

}



/**
@@ -2340,6 +2356,8 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) 
{

	int i, r;



	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);

	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);



	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {

		if (!adev->ip_blocks[i].status.valid)

drivers/gpu/drm/amd/amdgpu/cik.c

+0 −2
Original line number Diff line number Diff line
@@ -1358,8 +1358,6 @@ static int cik_asic_reset(struct amdgpu_device *adev) 
	int r;



	if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {

		if (!adev->in_suspend)

			amdgpu_inc_vram_lost(adev);

		r = amdgpu_dpm_baco_reset(adev);

	} else {

		r = cik_asic_pci_config_reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −1
Original line number Diff line number Diff line
@@ -279,7 +279,7 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_2_nv12[] = 


#define DEFAULT_SH_MEM_CONFIG \

	((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) | \

	 (SH_MEM_ALIGNMENT_MODE_DWORD << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | \

	 (SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | \

	 (SH_MEM_RETRY_MODE_ALL << SH_MEM_CONFIG__RETRY_MODE__SHIFT) | \

	 (3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT))

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −0
Original line number Diff line number Diff line
@@ -1234,6 +1234,8 @@ struct amdgpu_gfxoff_quirk { 
static const struct amdgpu_gfxoff_quirk amdgpu_gfxoff_quirk_list[] = {

	/* https://bugzilla.kernel.org/show_bug.cgi?id=204689 */

	{ 0x1002, 0x15dd, 0x1002, 0x15dd, 0xc8 },

	/* https://bugzilla.kernel.org/show_bug.cgi?id=207171 */

	{ 0x1002, 0x15dd, 0x103c, 0x83e7, 0xd3 },

	{ 0, 0, 0, 0, 0 },

};

drivers/gpu/drm/amd/amdgpu/nv.c

+0 −4
Original line number Diff line number Diff line
@@ -351,8 +351,6 @@ static int nv_asic_reset(struct amdgpu_device *adev) 
	struct smu_context *smu = &adev->smu;



	if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {

		if (!adev->in_suspend)

			amdgpu_inc_vram_lost(adev);

		ret = smu_baco_enter(smu);

		if (ret)

			return ret;
@@ -360,8 +358,6 @@ static int nv_asic_reset(struct amdgpu_device *adev) 
		if (ret)

			return ret;

	} else {

		if (!adev->in_suspend)

			amdgpu_inc_vram_lost(adev);

		ret = nv_asic_mode1_reset(adev);

	}

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