Commit 1e54afe9 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo
Browse files

clk: imx: gate2: Allow single bit gating clock 



Audiomix on i.MX8MP registers two gates that share the same enable count
but use the same bit to control the gate instead of two bits. By adding
the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
gate ops for enable, disable and is_enabled.
For the disable_unused, nothing happens if this flag is specified.

Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9558b51a

drivers/clk/imx/clk-gate2.c

+23 −8
Original line number Diff line number Diff line
@@ -41,21 +41,26 @@ static int clk_gate2_enable(struct clk_hw *hw) 
	struct clk_gate2 *gate = to_clk_gate2(hw);

	u32 reg;

	unsigned long flags;

	int ret = 0;



	spin_lock_irqsave(gate->lock, flags);



	if (gate->share_count && (*gate->share_count)++ > 0)

		goto out;



	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {

		ret = clk_gate_ops.enable(hw);

	} else {

		reg = readl(gate->reg);

		reg &= ~(3 << gate->bit_idx);

		reg |= gate->cgr_val << gate->bit_idx;

		writel(reg, gate->reg);

	}



out:

	spin_unlock_irqrestore(gate->lock, flags);



	return 0;

	return ret;

}



static void clk_gate2_disable(struct clk_hw *hw)
@@ -73,9 +78,13 @@ static void clk_gate2_disable(struct clk_hw *hw) 
			goto out;

	}



	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {

		clk_gate_ops.disable(hw);

	} else {

		reg = readl(gate->reg);

		reg &= ~(3 << gate->bit_idx);

		writel(reg, gate->reg);

	}



out:

	spin_unlock_irqrestore(gate->lock, flags);
@@ -95,6 +104,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw) 
{

	struct clk_gate2 *gate = to_clk_gate2(hw);



	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)

		return clk_gate_ops.is_enabled(hw);



	return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);

}
@@ -104,6 +116,9 @@ static void clk_gate2_disable_unused(struct clk_hw *hw) 
	unsigned long flags;

	u32 reg;



	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)

		return;



	spin_lock_irqsave(gate->lock, flags);



	if (!gate->share_count || *gate->share_count == 0) {

drivers/clk/imx/clk.h

+13 −0
Original line number Diff line number Diff line
@@ -5,6 +5,8 @@ 
#include <linux/spinlock.h>

#include <linux/clk-provider.h>



#define IMX_CLK_GATE2_SINGLE_BIT	1



extern spinlock_t imx_ccm_lock;



void imx_check_clocks(struct clk *clks[], unsigned int count);
@@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name, 
				  &imx_ccm_lock, share_count);

}



static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,

				const char *name, const char *parent,

				void __iomem *reg, u8 shift,

				unsigned int *share_count)

{

	return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |

					CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,

					IMX_CLK_GATE2_SINGLE_BIT,

					&imx_ccm_lock, share_count);

}



static inline struct clk *imx_clk_gate2_cgr(const char *name,

		const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)

{

CRA Git | Maintained and supported by SUSTech CRA and CCSE