Commit 1dfc41d4 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: add disable_smc_ctf callback in hwmgr.



export disablesmcctf to eventmgr.
need to disable temperature alert when s3/s4.
otherwise, when resume back,enable temperature
alert will fail.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 10e709cb
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+10 −0
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@@ -501,3 +501,13 @@ int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_i

	return hwmgr->hwmgr_func->get_max_high_clocks(hwmgr, clocks);
}

int phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr)
{
	PHM_FUNC_CHECK(hwmgr);

	if (hwmgr->hwmgr_func->disable_smc_firmware_ctf == NULL)
		return -EINVAL;

	return hwmgr->hwmgr_func->disable_smc_firmware_ctf(hwmgr);
}
+1 −0
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@@ -4695,6 +4695,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
	.release_firmware = smu7_release_firmware,
	.set_power_profile_state = smu7_set_power_profile_state,
	.avfs_control = smu7_avfs_control,
	.disable_smc_firmware_ctf = smu7_thermal_disable_alert,
};

uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
+1 −1
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@@ -431,6 +431,6 @@ extern int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
		struct pp_display_clock_request *clock);

extern int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);

extern int phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr);
#endif /* _HARDWARE_MANAGER_H_ */
+1 −0
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@@ -373,6 +373,7 @@ struct pp_hwmgr_func {
	int (*set_power_profile_state)(struct pp_hwmgr *hwmgr,
			struct amd_pp_profile *request);
	int (*avfs_control)(struct pp_hwmgr *hwmgr, bool enable);
	int (*disable_smc_firmware_ctf)(struct pp_hwmgr *hwmgr);
};

struct pp_table_func {