Commit 1db36525 authored by Anshuman Khandual's avatar Anshuman Khandual Committed by Michael Ellerman
Browse files

powerpc/kernel: Rename PACA_DSCR to PACA_DSCR_DEFAULT 



PACA_DSCR offset macro tracks dscr_default element in the paca
structure. Better change the name of this macro to match that of the
data element it tracks. Makes the code more readable.

Signed-off-by: default avatarAnshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 280e1099

arch/powerpc/kernel/asm-offsets.c

+1 −1
Original line number Diff line number Diff line
@@ -247,7 +247,7 @@ int main(void) 
#endif

	DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));

	DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));

	DEFINE(PACA_DSCR, offsetof(struct paca_struct, dscr_default));

	DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default));

	DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));

	DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));

	DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));

arch/powerpc/kernel/entry_64.S

+1 −1
Original line number Diff line number Diff line
@@ -556,7 +556,7 @@ BEGIN_FTR_SECTION 
	ld	r0,THREAD_DSCR(r4)

	cmpwi	r6,0

	bne	1f

	ld	r0,PACA_DSCR(r13)

	ld	r0,PACA_DSCR_DEFAULT(r13)

1:

BEGIN_FTR_SECTION_NESTED(70)

	mfspr	r8, SPRN_FSCR

arch/powerpc/kernel/tm.S

+2 −2
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ dont_backup_fp: 
	ld	r2, STK_GOT(r1)



	/* Load CPU's default DSCR */

	ld	r0, PACA_DSCR(r13)

	ld	r0, PACA_DSCR_DEFAULT(r13)

	mtspr	SPRN_DSCR, r0



	blr
@@ -473,7 +473,7 @@ restore_gprs: 
	ld	r2, STK_GOT(r1)



	/* Load CPU's default DSCR */

	ld	r0, PACA_DSCR(r13)

	ld	r0, PACA_DSCR_DEFAULT(r13)

	mtspr	SPRN_DSCR, r0



	blr

arch/powerpc/kvm/book3s_hv_rmhandlers.S

+1 −1
Original line number Diff line number Diff line
@@ -324,7 +324,7 @@ kvm_start_guest: 
kvm_secondary_got_guest:



	/* Set HSTATE_DSCR(r13) to something sensible */

	ld	r6, PACA_DSCR(r13)

	ld	r6, PACA_DSCR_DEFAULT(r13)

	std	r6, HSTATE_DSCR(r13)



	/* Order load of vcore, ptid etc. after load of vcpu */

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