drm/i915/fb: Track rpm wakerefs

	struct drm_device *dev = fb->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_gem_object *obj = intel_fb_obj(fb);

	intel_wakeref_t wakeref;

	struct i915_vma *vma;

	unsigned int pinctl;

	u32 alignment;

	 * intel_runtime_pm_put(), so it is correct to wrap only the

	 * pin/unpin/fence and not more.

	 */

	intel_runtime_pm_get(dev_priv);

	wakeref = intel_runtime_pm_get(dev_priv);

	atomic_inc(&dev_priv->gpu_error.pending_fb_pin);

err:

	atomic_dec(&dev_priv->gpu_error.pending_fb_pin);

	intel_runtime_pm_put_unchecked(dev_priv);

	intel_runtime_pm_put(dev_priv, wakeref);

	return vma;

}

	const struct i915_ggtt_view view = {

		.type = I915_GGTT_VIEW_NORMAL,

	};

	struct fb_info *info;

	struct drm_framebuffer *fb;

	intel_wakeref_t wakeref;

	struct fb_info *info;

	struct i915_vma *vma;

	unsigned long flags = 0;

	bool prealloc = false;

	}

	mutex_lock(&dev->struct_mutex);

	intel_runtime_pm_get(dev_priv);

	wakeref = intel_runtime_pm_get(dev_priv);

	/* Pin the GGTT vma for our access via info->screen_base.

	 * This also validates that any existing fb inherited from the

	ifbdev->vma = vma;

	ifbdev->vma_flags = flags;

	intel_runtime_pm_put_unchecked(dev_priv);

	intel_runtime_pm_put(dev_priv, wakeref);

	mutex_unlock(&dev->struct_mutex);

	vga_switcheroo_client_fb_set(pdev, info);

	return 0;

out_unpin:

	intel_unpin_fb_vma(vma, flags);

out_unlock:

	intel_runtime_pm_put_unchecked(dev_priv);

	intel_runtime_pm_put(dev_priv, wakeref);

	mutex_unlock(&dev->struct_mutex);

	return ret;

}