PCI: aardvark: Update comment about disabling link training (1d1cd163) · Commits · 戴 / test

According to PCI Express Base Specifications (rev 4.0, 6.6.1 "Conventional reset"), after fundamental reset a 100ms delay is needed prior to enabling link training. Update comment in code to reflect this requirement. Link: https://lore.kernel.org/r/20201202184659.3795-1-pali@kernel.org Signed-off-by:

Pali Rohár <pali@kernel.org> Signed-off-by:

Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

drivers/pci/controller/pci-aardvark.c

+8 −1

Original line number	Diff line number	Diff line
		@@ -259,7 +259,14 @@ static void advk_pcie_issue_perst(struct advk_pcie *pcie)
		if (!pcie->reset_gpio)
		return;

		/* PERST does not work for some cards when link training is enabled */
		/*
		* As required by PCI Express spec (PCI Express Base Specification, REV.
		* 4.0 PCI Express, February 19 2014, 6.6.1 Conventional Reset) a delay
		* for at least 100ms after de-asserting PERST# signal is needed before
		* link training is enabled. So ensure that link training is disabled
		* prior de-asserting PERST# signal to fulfill that PCI Express spec
		* requirement.
		*/
		reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
		reg &= ~LINK_TRAINING_EN;
		advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);

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