Commit 1d0761d2 authored by Alistair Popple's avatar Alistair Popple Committed by Michael Ellerman
Browse files

powerpc/powernv: Initialise nest mmu 



POWER9 contains an off core mmu called the nest mmu (NMMU). This is
used by other hardware units on the chip to translate virtual
addresses into real addresses. The unit attempting an address
translation provides the majority of the context required for the
translation request except for the base address of the partition table
(ie. the PTCR) which needs to be programmed into the NMMU.

This patch adds a call to OPAL to set the PTCR for the nest mmu in
opal_init().

Signed-off-by: default avatarAlistair Popple <alistair@popple.id.au>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 2a8628d4

arch/powerpc/include/asm/opal-api.h

+2 −1
Original line number Diff line number Diff line
@@ -167,7 +167,8 @@ 
#define OPAL_INT_EOI				124

#define OPAL_INT_SET_MFRR			125

#define OPAL_PCI_TCE_KILL			126

#define OPAL_LAST				126

#define OPAL_NMMU_SET_PTCR			127

#define OPAL_LAST				127



/* Device tree flags */

arch/powerpc/include/asm/opal.h

+1 −0
Original line number Diff line number Diff line
@@ -232,6 +232,7 @@ int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type, 
int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,

			     uint32_t pe_num, uint32_t tce_size,

			     uint64_t dma_addr, uint32_t npages);

int64_t opal_nmmu_set_ptcr(uint64_t chip_id, uint64_t ptcr);



/* Internal functions */

extern int early_init_dt_scan_opal(unsigned long node, const char *uname,

arch/powerpc/include/asm/powernv.h

0 → 100644
+19 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2017 IBM Corp.

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; either version

 * 2 of the License, or (at your option) any later version.

 */



#ifndef _ASM_POWERNV_H

#define _ASM_POWERNV_H



#ifdef CONFIG_PPC_POWERNV

extern void powernv_set_nmmu_ptcr(unsigned long ptcr);

#else

static inline void powernv_set_nmmu_ptcr(unsigned long ptcr) { }

#endif



#endif /* _ASM_POWERNV_H */

arch/powerpc/mm/pgtable-radix.c

+2 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <asm/machdep.h>

#include <asm/mmu.h>

#include <asm/firmware.h>

#include <asm/powernv.h>



#include <trace/events/thp.h>
@@ -438,6 +439,7 @@ void radix__mmu_cleanup_all(void) 
		lpcr = mfspr(SPRN_LPCR);

		mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);

		mtspr(SPRN_PTCR, 0);

		powernv_set_nmmu_ptcr(0);

		radix__flush_tlb_all();

	}

}

arch/powerpc/mm/pgtable_64.c

+5 −1
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ 
#include <asm/sections.h>

#include <asm/firmware.h>

#include <asm/dma.h>

#include <asm/powernv.h>



#include "mmu_decl.h"
@@ -436,6 +437,7 @@ void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift) 
void __init mmu_partition_table_init(void)

{

	unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;

	unsigned long ptcr;



	BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");

	partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
@@ -448,7 +450,9 @@ void __init mmu_partition_table_init(void) 
	 * update partition table control register,

	 * 64 K size.

	 */

	mtspr(SPRN_PTCR, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));

	ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);

	mtspr(SPRN_PTCR, ptcr);

	powernv_set_nmmu_ptcr(ptcr);

}



void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,

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