Commit 1cd21a7c authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915: Add Wa_1407352427:icl,ehl



The workaround database now indicates we need to disable psdunit clock
gating as well.

v3:
 - Rebase on top of other workarounds that have landed.
 - Restrict cc:stable tag to 5.2+ since that's when ICL was first
   officially supported.

Bspec: 32354
Bspec: 33450
Bspec: 33451
Suggested-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: stable@vger.kernel.org # v5.2+
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Acked-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191231190713.1549533-1-matthew.d.roper@intel.com
parent 32f408ac
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+1 −0
Original line number Diff line number Diff line
@@ -4183,6 +4183,7 @@ enum {

#define UNSLICE_UNIT_LEVEL_CLKGATE2	_MMIO(0x94e4)
#define   VSUNIT_CLKGATE_DIS_TGL	REG_BIT(19)
#define   PSDUNIT_CLKGATE_DIS		REG_BIT(5)

#define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)
#define   CGPSF_CLKGATE_DIS		(1 << 3)
+3 −0
Original line number Diff line number Diff line
@@ -6607,6 +6607,9 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
			 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);

	/* Wa_1407352427:icl,ehl */
	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
			 0, PSDUNIT_CLKGATE_DIS);
}

static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)