Commit 1c905d95 authored by YoungJun Cho's avatar YoungJun Cho Committed by Inki Dae
Browse files

drm/exynos: fimd: modify I80 i/f irq relevant routine 



For the I80 interface, the video interrupt pending register(VIDINTCON1)
should be handled in fimd_irq_handler() and the video interrupt control
register(VIDINTCON0) should be handled in fimd_enable_vblank() and
fimd_disable_vblank() like RGB interface.
So this patch moves each set / unset routines into proper positions.

Signed-off-by: default avatarYoungJun Cho <yj44.cho@samsung.com>
Acked-by: default avatarInki Dae <inki.dae@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent 999d8b31

drivers/gpu/drm/exynos/exynos_drm_fimd.c

+27 −26
Original line number Diff line number Diff line
@@ -469,12 +469,19 @@ static int fimd_enable_vblank(struct exynos_drm_manager *mgr) 
		val = readl(ctx->regs + VIDINTCON0);



		val |= VIDINTCON0_INT_ENABLE;



		if (ctx->i80_if) {

			val |= VIDINTCON0_INT_I80IFDONE;

			val |= VIDINTCON0_INT_SYSMAINCON;

			val &= ~VIDINTCON0_INT_SYSSUBCON;

		} else {

			val |= VIDINTCON0_INT_FRAME;



			val &= ~VIDINTCON0_FRAMESEL0_MASK;

			val |= VIDINTCON0_FRAMESEL0_VSYNC;

			val &= ~VIDINTCON0_FRAMESEL1_MASK;

			val |= VIDINTCON0_FRAMESEL1_NONE;

		}



		writel(val, ctx->regs + VIDINTCON0);

	}
@@ -493,9 +500,15 @@ static void fimd_disable_vblank(struct exynos_drm_manager *mgr) 
	if (test_and_clear_bit(0, &ctx->irq_flags)) {

		val = readl(ctx->regs + VIDINTCON0);



		val &= ~VIDINTCON0_INT_FRAME;

		val &= ~VIDINTCON0_INT_ENABLE;



		if (ctx->i80_if) {

			val &= ~VIDINTCON0_INT_I80IFDONE;

			val &= ~VIDINTCON0_INT_SYSMAINCON;

			val &= ~VIDINTCON0_INT_SYSSUBCON;

		} else

			val &= ~VIDINTCON0_INT_FRAME;



		writel(val, ctx->regs + VIDINTCON0);

	}

}
@@ -959,19 +972,15 @@ static void fimd_trigger(struct device *dev) 
	u32 reg;



	 /*

	 * Skips to trigger if in triggering state, because multiple triggering

	  * Skips triggering if in triggering state, because multiple triggering

	  * requests can cause panel reset.

	  */

	if (atomic_read(&ctx->triggering))

		return;



	/* Enters triggering mode */

	atomic_set(&ctx->triggering, 1);



	reg = readl(ctx->regs + VIDINTCON0);

	reg |= (VIDINTCON0_INT_ENABLE | VIDINTCON0_INT_I80IFDONE |

						VIDINTCON0_INT_SYSMAINCON);

	writel(reg, ctx->regs + VIDINTCON0);



	reg = readl(timing_base + TRIGCON);

	reg |= (TRGMODE_I80_RGB_ENABLE_I80 | SWTRGCMD_I80_RGB_ENABLE);

	writel(reg, timing_base + TRIGCON);
@@ -1036,21 +1045,13 @@ static irqreturn_t fimd_irq_handler(int irq, void *dev_id) 
	if (ctx->pipe < 0 || !ctx->drm_dev)

		goto out;



	if (ctx->i80_if) {

		/* unset I80 frame done interrupt */

		val = readl(ctx->regs + VIDINTCON0);

		val &= ~(VIDINTCON0_INT_I80IFDONE | VIDINTCON0_INT_SYSMAINCON);

		writel(val, ctx->regs + VIDINTCON0);



		/* exit triggering mode */

		atomic_set(&ctx->triggering, 0);



		drm_handle_vblank(ctx->drm_dev, ctx->pipe);

		exynos_drm_crtc_finish_pageflip(ctx->drm_dev, ctx->pipe);

	} else {

	drm_handle_vblank(ctx->drm_dev, ctx->pipe);

	exynos_drm_crtc_finish_pageflip(ctx->drm_dev, ctx->pipe);



	if (ctx->i80_if) {

		/* Exits triggering mode */

		atomic_set(&ctx->triggering, 0);

	} else {

		/* set wait vsync event to zero and wake up queue. */

		if (atomic_read(&ctx->wait_vsync_event)) {

			atomic_set(&ctx->wait_vsync_event, 0);

CRA Git | Maintained and supported by SUSTech CRA and CCSE