Commit 1bf4d7c5 authored by Hai Li's avatar Hai Li Committed by Rob Clark
Browse files

drm/msm/dsi: Make each PHY type compilation independent 



On a certain platform, only one type of DSI PHY is used.
This change allows the user to only compile the PHY type
which is being used.

Signed-off-by: default avatarHai Li <hali@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 5c829028

drivers/gpu/drm/msm/Kconfig

+14 −0
Original line number Diff line number Diff line
@@ -54,3 +54,17 @@ config DRM_MSM_DSI_PLL 
	help

	  Choose this option to enable DSI PLL driver which provides DSI

	  source clocks under common clock framework.



config DRM_MSM_DSI_28NM_PHY

	bool "Enable DSI 28nm PHY driver in MSM DRM"

	depends on DRM_MSM_DSI

	default y

	help

	  Choose this option if the 28nm DSI PHY is used on the platform.



config DRM_MSM_DSI_20NM_PHY

	bool "Enable DSI 20nm PHY driver in MSM DRM"

	depends on DRM_MSM_DSI

	default y

	help

	  Choose this option if the 20nm DSI PHY is used on the platform.

drivers/gpu/drm/msm/Makefile

+7 −4
Original line number Diff line number Diff line
@@ -57,11 +57,14 @@ msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ 
			dsi/dsi_host.o \

			dsi/dsi_manager.o \

			dsi/phy/dsi_phy.o \

			dsi/phy/dsi_phy_20nm.o \

			dsi/phy/dsi_phy_28nm.o \

			mdp/mdp5/mdp5_cmd_encoder.o



msm-$(CONFIG_DRM_MSM_DSI_PLL) += dsi/pll/dsi_pll.o \

				dsi/pll/dsi_pll_28nm.o

msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o

msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o



ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)

msm-y += dsi/pll/dsi_pll.o

msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o

endif



obj-$(CONFIG_DRM_MSM)	+= msm.o

drivers/gpu/drm/msm/dsi/phy/dsi_phy.c

+4 −0
Original line number Diff line number Diff line
@@ -267,12 +267,16 @@ static void dsi_phy_disable_resource(struct msm_dsi_phy *phy) 
}



static const struct of_device_id dsi_phy_dt_match[] = {

#ifdef CONFIG_DRM_MSM_DSI_28NM_PHY

	{ .compatible = "qcom,dsi-phy-28nm-hpm",

	  .data = &dsi_phy_28nm_hpm_cfgs },

	{ .compatible = "qcom,dsi-phy-28nm-lp",

	  .data = &dsi_phy_28nm_lp_cfgs },

#endif

#ifdef CONFIG_DRM_MSM_DSI_20NM_PHY

	{ .compatible = "qcom,dsi-phy-20nm",

	  .data = &dsi_phy_20nm_cfgs },

#endif

	{}

};

drivers/gpu/drm/msm/dsi/pll/dsi_pll.h

+8 −0
Original line number Diff line number Diff line
@@ -83,8 +83,16 @@ void msm_dsi_pll_helper_unregister_clks(struct platform_device *pdev, 
/*

 * Initialization for Each PLL Type

 */

#ifdef CONFIG_DRM_MSM_DSI_28NM_PHY

struct msm_dsi_pll *msm_dsi_pll_28nm_init(struct platform_device *pdev,

					enum msm_dsi_phy_type type, int id);

#else

static inline struct msm_dsi_pll *msm_dsi_pll_28nm_init(

	struct platform_device *pdev, enum msm_dsi_phy_type type, int id)

{

	return ERR_PTR(-ENODEV);

}

#endif



#endif /* __DSI_PLL_H__ */

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