Commit 1ba5568c authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux into next/dt 

Merge "Broadcom Cygnus SoC Device Tree changes" from Florian Fianelli:

This patchset contains initial support for Broadcom's Cygnus SoC based on our
iProc architecture. Initial support is minimal and includes just the mach
platform code, clock driver, and a basic device tree configuration. Peripheral
drivers will be submitted soon, as will device tree configurations for other
Cygnus board variants.

These are the Device Tree changes

* tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux

:
  ARM: dts: Enable Broadcom Cygnus SoC
  dt-bindings: Document Broadcom Cygnus SoC and clocks

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a0f3e826 8872fc22

Documentation/devicetree/bindings/arm/bcm/cygnus.txt

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Broadcom Cygnus device tree bindings

------------------------------------





Boards with Cygnus SoCs shall have the following properties:



Required root node property:



BCM11300

compatible = "brcm,bcm11300", "brcm,cygnus";



BCM11320

compatible = "brcm,bcm11320", "brcm,cygnus";



BCM11350

compatible = "brcm,bcm11350", "brcm,cygnus";



BCM11360

compatible = "brcm,bcm11360", "brcm,cygnus";



BCM58300

compatible = "brcm,bcm58300", "brcm,cygnus";



BCM58302

compatible = "brcm,bcm58302", "brcm,cygnus";



BCM58303

compatible = "brcm,bcm58303", "brcm,cygnus";



BCM58305

compatible = "brcm,bcm58305", "brcm,cygnus";

Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt

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Broadcom Cygnus Clocks



This binding uses the common clock binding:

Documentation/devicetree/bindings/clock/clock-bindings.txt



Currently various "fixed" clocks are declared for peripheral drivers that use

the common clock framework to reference their core clocks. Proper support of

these clocks will be added later



Device tree example:



	clocks {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		osc: oscillator {

			compatible = "fixed-clock";

			#clock-cells = <1>;

			clock-frequency = <25000000>;

		};



		apb_clk: apb_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <1000000000>;

		};



		periph_clk: periph_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <500000000>;

		};

	};

arch/arm/boot/dts/Makefile

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@@ -54,6 +54,10 @@ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb 
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb

dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb

dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb

dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \

	bcm911360_entphn.dtb \

	bcm911360k.dtb \

	bcm958300k.dtb

dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb

dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb

dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \

arch/arm/boot/dts/bcm-cygnus-clock.dtsi

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/*

 * Copyright 2014 Broadcom Corporation.  All rights reserved.

 *

 * Unless you and Broadcom execute a separate written software license

 * agreement governing use of this software, this software is licensed to you

 * under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



clocks {

	#address-cells = <1>;

	#size-cells = <1>;

	ranges;



	osc: oscillator {

		compatible = "fixed-clock";

		#clock-cells = <1>;

		clock-frequency = <25000000>;

	};



	apb_clk: apb_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <1000000000>;

	};



	periph_clk: periph_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <500000000>;

	};



	sdio_clk: lcpll_ch2 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <200000000>;

	};



	axi81_clk: axi81_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <100000000>;

	};



	keypad_clk: keypad_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <31806>;

	};



	adc_clk: adc_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <1562500>;

	};



	pwm_clk: pwm_clk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <1000000>;

	};



	lcd_clk: mipipll_ch1 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <100000000>;

	};

};

arch/arm/boot/dts/bcm-cygnus.dtsi

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/*

 * Copyright 2014 Broadcom Corporation.  All rights reserved.

 *

 * Unless you and Broadcom execute a separate written software license

 * agreement governing use of this software, this software is licensed to you

 * under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>



#include "skeleton.dtsi"



/ {

	compatible = "brcm,cygnus";

	model = "Broadcom Cygnus SoC";

	interrupt-parent = <&gic>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			next-level-cache = <&L2>;

			reg = <0x0>;

		};

	};



	/include/ "bcm-cygnus-clock.dtsi"



	amba {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "arm,amba-bus", "simple-bus";

		interrupt-parent = <&gic>;

		ranges;



		wdt@18009000 {

			 compatible = "arm,sp805" , "arm,primecell";

			 reg = <0x18009000 0x1000>;

			 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;

			 clocks = <&axi81_clk>;

			 clock-names = "apb_pclk";

		};

	};



	uart3: serial@18023000 {

		compatible = "snps,dw-apb-uart";

		reg = <0x18023000 0x100>;

		reg-shift = <2>;

		reg-io-width = <4>;

		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <100000000>;

		clocks = <&axi81_clk>;

		status = "okay";

	};



	uart0: serial@18020000 {

		compatible = "snps,dw-apb-uart";

		reg = <0x18020000 0x100>;

		reg-shift = <2>;

		reg-io-width = <4>;

		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&axi81_clk>;

		clock-frequency = <100000000>;

		status = "okay";

	};



	gic: interrupt-controller@19021000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

		#address-cells = <0>;

		interrupt-controller;

		reg = <0x19021000 0x1000>,

		      <0x19020100 0x100>;

	};



	L2: l2-cache {

		compatible = "arm,pl310-cache";

		reg = <0x19022000 0x1000>;

		cache-unified;

		cache-level = <2>;

	};



	timer@19020200 {

		compatible = "arm,cortex-a9-global-timer";

		reg = <0x19020200 0x100>;

		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&periph_clk>;

	};



};

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