Commit 1b7b86f6 authored by Luka Kovacic's avatar Luka Kovacic Committed by Gregory CLEMENT
Browse files

ARM: dts: mvebu: Add CRS305-1G-4S board 



MikroTik CRS305-1G-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.

This device tree includes basic Linux support.

Signed-off-by: default avatarLuka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent b08770ff

arch/arm/boot/dts/Makefile

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@@ -1340,6 +1340,8 @@ dtb-$(CONFIG_MACH_ARMADA_39X) += \ 
	armada-398-db.dtb

dtb-$(CONFIG_MACH_ARMADA_XP) += \

	armada-xp-axpwifiap.dtb \

	armada-xp-crs305-1g-4s.dtb \

	armada-xp-crs305-1g-4s-bit.dtb \

	armada-xp-crs326-24g-2s.dtb \

	armada-xp-crs326-24g-2s-bit.dtb \

	armada-xp-db.dtb \

arch/arm/boot/dts/armada-xp-crs305-1g-4s-bit.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for MikroTik CRS305-1G-4S+ Bit board

 *

 * Copyright (C) 2020 Sartura Ltd.

 * Author: Luka Kovacic <luka.kovacic@sartura.hr>

 */



#include "armada-xp-crs305-1g-4s.dtsi"



/ {

	model = "MikroTik CRS305-1G-4S+ Bit";

};



&spi0 {

	status = "okay";



	spi-flash@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "jedec,spi-nor";

		reg = <0>; /* Chip select 0 */

		spi-max-frequency = <108000000>;

		m25p,fast-read;



		partition@u-boot {

			reg = <0x00000000 0x001f0000>;

			label = "u-boot";

		};

		partition@u-boot-env {

			reg = <0x001f0000 0x00010000>;

			label = "u-boot-env";

		};

		partition@ubi1 {

			reg = <0x00200000 0x03f00000>;

			label = "ubi1";

		};

		partition@ubi2 {

			reg = <0x04100000 0x03f00000>;

			label = "ubi2";

		};

	};

};

arch/arm/boot/dts/armada-xp-crs305-1g-4s.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for MikroTik CRS305-1G-4S+ board

 *

 * Copyright (C) 2020 Sartura Ltd.

 * Author: Luka Kovacic <luka.kovacic@sartura.hr>

 */



#include "armada-xp-crs305-1g-4s.dtsi"



/ {

	model = "MikroTik CRS305-1G-4S+";

};



&spi0 {

	status = "okay";

};

arch/arm/boot/dts/armada-xp-crs305-1g-4s.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for CRS305-1G-4S board

 *

 * Copyright (C) 2016 Allied Telesis Labs

 * Copyright (C) 2020 Sartura Ltd.

 *

 * Based on armada-xp-db.dts

 *

 * Note: this Device Tree assumes that the bootloader has remapped the

 * internal registers to 0xf1000000 (instead of the default

 * 0xd0000000). The 0xf1000000 is the default used by the recent,

 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier

 * boards were delivered with an older version of the bootloader that

 * left internal registers mapped at 0xd0000000. If you are in this

 * situation, you should either update your bootloader (preferred

 * solution) or the below Device Tree should be adjusted.

 */



/dts-v1/;

#include "armada-xp-98dx3236.dtsi"



/ {

	model = "CRS305-1G-4S+";

	compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";



	chosen {

		bootargs = "console=ttyS0,115200 earlyprintk";

	};



	memory {

		device_type = "memory";

		reg = <0 0x00000000 0 0x20000000>; /* 512 MB */

	};

};



&L2 {

	arm,parity-enable;

	marvell,ecc-enable;

};



&devbus_bootcs {

	status = "okay";



	/* Device Bus parameters are required */



	/* Read parameters */

	devbus,bus-width    = <16>;

	devbus,turn-off-ps  = <60000>;

	devbus,badr-skew-ps = <0>;

	devbus,acc-first-ps = <124000>;

	devbus,acc-next-ps  = <248000>;

	devbus,rd-setup-ps  = <0>;

	devbus,rd-hold-ps   = <0>;



	/* Write parameters */

	devbus,sync-enable = <0>;

	devbus,wr-high-ps  = <60000>;

	devbus,wr-low-ps   = <60000>;

	devbus,ale-wr-ps   = <60000>;

};



&uart0 {

	status = "okay";

};



&uart1 {

	status = "okay";

};



&i2c0 {

	clock-frequency = <100000>;

	status = "okay";

};



&usb0 {

	status = "okay";

};



&spi0 {

	status = "okay";



	spi-flash@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "jedec,spi-nor";

		reg = <0>; /* Chip select 0 */

		spi-max-frequency = <108000000>;

		m25p,fast-read;



		partition@u-boot {

			reg = <0x00000000 0x001f0000>;

			label = "u-boot";

		};

		partition@u-boot-env {

			reg = <0x001f0000 0x00010000>;

			label = "u-boot-env";

		};

		partition@ubi1 {

			reg = <0x00200000 0x00e00000>;

			label = "ubi1";

		};

	};

};

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