Commit 1b57d91b authored by Valentin Schneider's avatar Valentin Schneider Committed by Marc Zyngier
Browse files

irqchip/gic-v2, v3: Prevent SW resends entirely 



The GIC irqchips can now use a HW resend when a retrigger is invoked by
check_irq_resend(). However, should the HW resend fail, check_irq_resend()
will still attempt to trigger a SW resend, which is still a bad idea for
the GICs.

Prevent this from happening by setting IRQD_HANDLE_ENFORCE_IRQCTX on all
GIC IRQs. Technically per-cpu IRQs do not need this, as their flow handlers
never set IRQS_PENDING, but this aligns all IRQs wrt context enforcement:
this also forces all GIC IRQ handling to happen in IRQ context (as defined
by in_irq()).

Signed-off-by: default avatarValentin Schneider <valentin.schneider@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200730170321.31228-3-valentin.schneider@arm.com
parent 5f774f5e

drivers/irqchip/irq-gic-v3.c

+4 −1
Original line number Diff line number Diff line
@@ -1279,6 +1279,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
			      irq_hw_number_t hw)

{

	struct irq_chip *chip = &gic_chip;

	struct irq_data *irqd = irq_desc_get_irq_data(irq_to_desc(irq));



	if (static_branch_likely(&supports_deactivate_key))

		chip = &gic_eoimode1_chip;
@@ -1296,7 +1297,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
		irq_domain_set_info(d, irq, hw, chip, d->host_data,

				    handle_fasteoi_irq, NULL, NULL);

		irq_set_probe(irq);

		irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));

		irqd_set_single_target(irqd);

		break;



	case LPI_RANGE:
@@ -1310,6 +1311,8 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
		return -EPERM;

	}



	/* Prevents SW retriggers which mess up the ACK/EOI ordering */

	irqd_set_handle_enforce_irqctx(irqd);

	return 0;

}

drivers/irqchip/irq-gic.c

+5 −1
Original line number Diff line number Diff line
@@ -975,6 +975,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
				irq_hw_number_t hw)

{

	struct gic_chip_data *gic = d->host_data;

	struct irq_data *irqd = irq_desc_get_irq_data(irq_to_desc(irq));



	if (hw < 32) {

		irq_set_percpu_devid(irq);
@@ -984,8 +985,11 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 
		irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,

				    handle_fasteoi_irq, NULL, NULL);

		irq_set_probe(irq);

		irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));

		irqd_set_single_target(irqd);

	}



	/* Prevents SW retriggers which mess up the ACK/EOI ordering */

	irqd_set_handle_enforce_irqctx(irqd);

	return 0;

}

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