Commit 1b3b27b2 authored by tianci yin's avatar tianci yin Committed by Alex Deucher
Browse files

drm/amd/powerplay: improve OD code robustness 



add protection code to avoid lower frequency trigger over drive.

Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarTianci Yin <tianci.yin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4944af67

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+8 −4
Original line number Diff line number Diff line
@@ -3589,8 +3589,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons 
	}



	if (i >= sclk_table->count) {

		if (sclk > sclk_table->dpm_levels[i-1].value) {

			data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;

			sclk_table->dpm_levels[i-1].value = sclk;

		}

	} else {

	/* TODO: Check SCLK in DAL's minimum clocks

	 * in case DeepSleep divider update is required.
@@ -3607,9 +3609,11 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons 
	}



	if (i >= mclk_table->count) {

		if (mclk > mclk_table->dpm_levels[i-1].value) {

			data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;

			mclk_table->dpm_levels[i-1].value = mclk;

		}

	}



	if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)

		data->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK;

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

+8 −4
Original line number Diff line number Diff line
@@ -3266,9 +3266,11 @@ static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, co 
	}



	if (i >= sclk_table->count) {

		if (sclk > sclk_table->dpm_levels[i-1].value) {

			data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;

			sclk_table->dpm_levels[i-1].value = sclk;

		}

	}



	for (i = 0; i < mclk_table->count; i++) {

		if (mclk == mclk_table->dpm_levels[i].value)
@@ -3276,9 +3278,11 @@ static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, co 
	}



	if (i >= mclk_table->count) {

		if (mclk > mclk_table->dpm_levels[i-1].value) {

			data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;

			mclk_table->dpm_levels[i-1].value = mclk;

		}

	}



	if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)

		data->need_update_dpm_table |= DPMTABLE_UPDATE_MCLK;

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