Commit 1af8a0c1 authored by Glauber de Oliveira Costa's avatar Glauber de Oliveira Costa Committed by Ingo Molnar
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x86: use apic_*_around instead of apic_write in x86_64 



This patch replaces apic_read() for apic_read_around()
and apic_write for apic_write_around() in smpboot_64.c
We do it to have a common usage between x86_64 and i386.
In the former, it will always simply expand to apic_write

Signed-off-by: default avatarGlauber Costa <gcosta@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ba10485c

arch/x86/kernel/smpboot_64.c

+10 −8
Original line number Diff line number Diff line
@@ -281,8 +281,8 @@ static void inquire_remote_apic(int apicid) 
			printk(KERN_CONT

			       "a previous APIC delivery may have failed\n");



		apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));

		apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);

		apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));

		apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);



		timeout = 0;

		do {
@@ -315,12 +315,12 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 
	/*

	 * Turn INIT on target chip

	 */

	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));

	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));



	/*

	 * Send IPI

	 */

	apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT

	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT

				| APIC_DM_INIT);



	Dprintk("Waiting for send to finish...\n");
@@ -331,10 +331,10 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 
	Dprintk("Deasserting INIT.\n");



	/* Target chip */

	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));

	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));



	/* Send IPI */

	apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);

	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);



	Dprintk("Waiting for send to finish...\n");

	send_status = safe_apic_wait_icr_idle();
@@ -353,6 +353,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 


	for (j = 1; j <= num_starts; j++) {

		Dprintk("Sending STARTUP #%d.\n",j);

		apic_read_around(APIC_SPIV);

		apic_write(APIC_ESR, 0);

		apic_read(APIC_ESR);

		Dprintk("After apic_write.\n");
@@ -362,11 +363,11 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 
		 */



		/* Target chip */

		apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));

		apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));



		/* Boot on the stack */

		/* Kick the second */

		apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));

		apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));



		/*

		 * Give the other CPU some time to accept the IPI.
@@ -386,6 +387,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 
		 * Due to the Pentium erratum 3AP.

		 */

		if (maxlvt > 3) {

			apic_read_around(APIC_SPIV);

			apic_write(APIC_ESR, 0);

		}

		accept_status = (apic_read(APIC_ESR) & 0xEF);

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