Commit 1ae99eab authored by Oak Zeng's avatar Oak Zeng Committed by Alex Deucher
Browse files

drm/amdkfd: Initialize HSA_CAP_ATS_PRESENT capability in topology codes



Move HSA_CAP_ATS_PRESENT initialization logic from kfd iommu codes to
kfd topology codes. This removes kfd_iommu_device_init's dependency
on kfd_topology_add_device. Also remove duplicate code setting the
same.

Signed-off-by: default avatarOak Zeng <Oak.Zeng@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f77dac6c
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+1 −9
Original line number Diff line number Diff line
@@ -66,16 +66,8 @@ int kfd_iommu_device_init(struct kfd_dev *kfd)

	top_dev = kfd_topology_device_by_id(kfd->id);

	/*
	 * Overwrite ATS capability according to needs_iommu_device to fix
	 * potential missing corresponding bit in CRAT of BIOS.
	 */
	if (!kfd->device_info->needs_iommu_device) {
		top_dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
	if (!kfd->device_info->needs_iommu_device)
		return 0;
	}

	top_dev->node_props.capability |= HSA_CAP_ATS_PRESENT;

	iommu_info.flags = 0;
	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
+9 −2
Original line number Diff line number Diff line
@@ -1330,17 +1330,24 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
		     dev->gpu->device_info->asic_family);
	}

	/*
	* Overwrite ATS capability according to needs_iommu_device to fix
	* potential missing corresponding bit in CRAT of BIOS.
	*/
	if (dev->gpu->device_info->needs_iommu_device)
		dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
	else
		dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;

	/* Fix errors in CZ CRAT.
	 * simd_count: Carrizo CRAT reports wrong simd_count, probably
	 *		because it doesn't consider masked out CUs
	 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
	 * capability flag: Carrizo CRAT doesn't report IOMMU flags
	 */
	if (dev->gpu->device_info->asic_family == CHIP_CARRIZO) {
		dev->node_props.simd_count =
			cu_info.simd_per_cu * cu_info.cu_active_number;
		dev->node_props.max_waves_per_simd = 10;
		dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
	}

	ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd));