Commit 1abe3af2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm 

* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6657/1: hw_breakpoint: fix ptrace breakpoint advertising on unsupported arch
  ARM: 6656/1: hw_breakpoint: avoid UNPREDICTABLE behaviour when reading DBGDSCR
  ARM: 6658/1: collie: do actually pass locomo_info to locomo driver
  ARM: 6659/1: Thumb-2: Make CONFIG_OABI_COMPAT depend on !CONFIG_THUMB2_KERNEL
  ARM: 6654/1: perf/oprofile: fix off-by-one in stack check
  ARM: fixup SMP alternatives in modules
  ARM: make SWP emulation explicit on !CPU_USE_DOMAINS
  ARM: Avoid building unsafe kernels on OMAP2 and MX3
  ARM: pxa: Properly configure PWM period for palm27x
  ARM: pxa: only save/restore registers when pm functions are defined
  ARM: pxa/colibri: use correct SD detect pin
  ARM: pxa: fix mfpr_sync to read from valid offset
parents 15a831f2 e3329cba

arch/arm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -1391,7 +1391,7 @@ config AEABI 


config OABI_COMPAT

	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"

	depends on AEABI && EXPERIMENTAL

	depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL

	default y

	help

	  This option preserves the old syscall interface along with the

arch/arm/kernel/head.S

+26 −12
Original line number Diff line number Diff line
@@ -391,6 +391,7 @@ ENDPROC(__turn_mmu_on) 




#ifdef CONFIG_SMP_ON_UP

	__INIT

__fixup_smp:

	and	r3, r9, #0x000f0000	@ architecture version

	teq	r3, #0x000f0000		@ CPU ID supported?
@@ -415,18 +416,7 @@ __fixup_smp_on_up: 
	sub	r3, r0, r3

	add	r4, r4, r3

	add	r5, r5, r3

2:	cmp	r4, r5

	movhs	pc, lr

	ldmia	r4!, {r0, r6}

 ARM(	str	r6, [r0, r3]	)

 THUMB(	add	r0, r0, r3	)

#ifdef __ARMEB__

 THUMB(	mov	r6, r6, ror #16	)	@ Convert word order for big-endian.

#endif

 THUMB(	strh	r6, [r0], #2	)	@ For Thumb-2, store as two halfwords

 THUMB(	mov	r6, r6, lsr #16	)	@ to be robust against misaligned r3.

 THUMB(	strh	r6, [r0]	)

	b	2b

	b	__do_fixup_smp_on_up

ENDPROC(__fixup_smp)



	.align
@@ -440,7 +430,31 @@ smp_on_up: 
	ALT_SMP(.long	1)

	ALT_UP(.long	0)

	.popsection

#endif



	.text

__do_fixup_smp_on_up:

	cmp	r4, r5

	movhs	pc, lr

	ldmia	r4!, {r0, r6}

 ARM(	str	r6, [r0, r3]	)

 THUMB(	add	r0, r0, r3	)

#ifdef __ARMEB__

 THUMB(	mov	r6, r6, ror #16	)	@ Convert word order for big-endian.

#endif

 THUMB(	strh	r6, [r0], #2	)	@ For Thumb-2, store as two halfwords

 THUMB(	mov	r6, r6, lsr #16	)	@ to be robust against misaligned r3.

 THUMB(	strh	r6, [r0]	)

	b	__do_fixup_smp_on_up

ENDPROC(__do_fixup_smp_on_up)



ENTRY(fixup_smp)

	stmfd	sp!, {r4 - r6, lr}

	mov	r4, r0

	add	r5, r0, r1

	mov	r3, #0

	bl	__do_fixup_smp_on_up

	ldmfd	sp!, {r4 - r6, pc}

ENDPROC(fixup_smp)



#include "head-common.S"

arch/arm/kernel/hw_breakpoint.c

+26 −18
Original line number Diff line number Diff line
@@ -137,11 +137,10 @@ static u8 get_debug_arch(void) 
	u32 didr;



	/* Do we implement the extended CPUID interface? */

	if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {

		pr_warning("CPUID feature registers not supported. "

				"Assuming v6 debug is present.\n");

	if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),

	    "CPUID feature registers not supported. "

	    "Assuming v6 debug is present.\n"))

		return ARM_DEBUG_ARCH_V6;

	}



	ARM_DBG_READ(c0, 0, didr);

	return (didr >> 16) & 0xf;
@@ -152,6 +151,12 @@ u8 arch_get_debug_arch(void) 
	return debug_arch;

}



static int debug_arch_supported(void)

{

	u8 arch = get_debug_arch();

	return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;

}



/* Determine number of BRP register available. */

static int get_num_brp_resources(void)

{
@@ -268,6 +273,9 @@ out: 


int hw_breakpoint_slots(int type)

{

	if (!debug_arch_supported())

		return 0;



	/*

	 * We can be called early, so don't rely on

	 * our static variables being initialised.
@@ -834,11 +842,11 @@ static void reset_ctrl_regs(void *unused) 


	/*

	 * v7 debug contains save and restore registers so that debug state

	 * can be maintained across low-power modes without leaving

	 * the debug logic powered up. It is IMPLEMENTATION DEFINED whether

	 * we can write to the debug registers out of reset, so we must

	 * unlock the OS Lock Access Register to avoid taking undefined

	 * instruction exceptions later on.

	 * can be maintained across low-power modes without leaving the debug

	 * logic powered up. It is IMPLEMENTATION DEFINED whether we can access

	 * the debug registers out of reset, so we must unlock the OS Lock

	 * Access Register to avoid taking undefined instruction exceptions

	 * later on.

	 */

	if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {

		/*
@@ -882,7 +890,7 @@ static int __init arch_hw_breakpoint_init(void) 


	debug_arch = get_debug_arch();



	if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) {

	if (!debug_arch_supported()) {

		pr_info("debug architecture 0x%x unsupported.\n", debug_arch);

		return 0;

	}
@@ -899,18 +907,18 @@ static int __init arch_hw_breakpoint_init(void) 
		pr_info("%d breakpoint(s) reserved for watchpoint "

				"single-step.\n", core_num_reserved_brps);



	ARM_DBG_READ(c1, 0, dscr);

	if (dscr & ARM_DSCR_HDBGEN) {

		pr_warning("halting debug mode enabled. Assuming maximum "

				"watchpoint size of 4 bytes.");

	} else {

	/*

	 * Reset the breakpoint resources. We assume that a halting

	 * debugger will leave the world in a nice state for us.

	 */

		smp_call_function(reset_ctrl_regs, NULL, 1);

		reset_ctrl_regs(NULL);

	on_each_cpu(reset_ctrl_regs, NULL, 1);



	ARM_DBG_READ(c1, 0, dscr);

	if (dscr & ARM_DSCR_HDBGEN) {

		max_watchpoint_len = 4;

		pr_warning("halting debug mode enabled. Assuming maximum "

			   "watchpoint size of %u bytes.", max_watchpoint_len);

	} else {

		/* Work out the maximum supported watchpoint length. */

		max_watchpoint_len = get_max_wp_len();

		pr_info("maximum watchpoint size is %u bytes.\n",

arch/arm/kernel/module.c

+21 −1
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 


#include <asm/pgtable.h>

#include <asm/sections.h>

#include <asm/smp_plat.h>

#include <asm/unwind.h>



#ifdef CONFIG_XIP_KERNEL
@@ -268,12 +269,28 @@ struct mod_unwind_map { 
	const Elf_Shdr *txt_sec;

};



static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,

	const Elf_Shdr *sechdrs, const char *name)

{

	const Elf_Shdr *s, *se;

	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;



	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)

		if (strcmp(name, secstrs + s->sh_name) == 0)

			return s;



	return NULL;

}



extern void fixup_smp(const void *, unsigned long);



int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,

		    struct module *mod)

{

	const Elf_Shdr * __maybe_unused s = NULL;

#ifdef CONFIG_ARM_UNWIND

	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;

	const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;

	const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;

	struct mod_unwind_map maps[ARM_SEC_MAX];

	int i;
@@ -315,6 +332,9 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, 
					         maps[i].txt_sec->sh_addr,

					         maps[i].txt_sec->sh_size);

#endif

	s = find_mod_section(hdr, sechdrs, ".alt.smp.init");

	if (s && !is_smp())

		fixup_smp((void *)s->sh_addr, s->sh_size);

	return 0;

}

arch/arm/kernel/perf_event.c

+1 −1
Original line number Diff line number Diff line
@@ -700,7 +700,7 @@ user_backtrace(struct frame_tail __user *tail, 
	 * Frame pointers should strictly progress back up the stack

	 * (towards higher addresses).

	 */

	if (tail >= buftail.fp)

	if (tail + 1 >= buftail.fp)

		return NULL;



	return buftail.fp - 1;

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