Commit 1abd02e2 authored by Jesse Barnes's avatar Jesse Barnes Committed by Daniel Vetter
Browse files

drm/i915: don't rewrite the GTT on resume v4 



The BIOS shouldn't be touching this memory across suspend/resume, so
just leave it alone.  This saves us ~6ms on resume on my T420 (retested
with write combined PTEs).

v2: change gtt restore default on pre-gen4 (Chris)
    move needs_gtt_restore flag into dev_priv
v3: make sure we restore GTT on resume from hibernate (Daniel)
    use opregion support as the cutoff for restore from resume (Chris)
v4: use a better check for opregion (Chris)

Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Kill the needs_gtt_restore indirection and check directly for
OpRegion. Also explain in a comment what's going on.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 4fc688ce

drivers/gpu/drm/i915/i915_dma.c

+0 −1
Original line number Diff line number Diff line
@@ -1594,7 +1594,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	intel_setup_gmbus(dev);

	intel_opregion_setup(dev);



	/* Make sure the bios did its job and set up vital registers */

	intel_setup_bios(dev);



	i915_gem_load(dev);

drivers/gpu/drm/i915/i915_drv.c

+33 −10
Original line number Diff line number Diff line
@@ -537,19 +537,11 @@ void intel_console_resume(struct work_struct *work) 
	console_unlock();

}



static int i915_drm_thaw(struct drm_device *dev)

static int __i915_drm_thaw(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int error = 0;



	intel_gt_reset(dev);



	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		mutex_lock(&dev->struct_mutex);

		i915_gem_restore_gtt_mappings(dev);

		mutex_unlock(&dev->struct_mutex);

	}



	i915_restore_state(dev);

	intel_opregion_setup(dev);
@@ -588,8 +580,26 @@ static int i915_drm_thaw(struct drm_device *dev) 
	return error;

}



static int i915_drm_thaw(struct drm_device *dev)

{

	int error = 0;



	intel_gt_reset(dev);



	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		mutex_lock(&dev->struct_mutex);

		i915_gem_restore_gtt_mappings(dev);

		mutex_unlock(&dev->struct_mutex);

	}



	__i915_drm_thaw(dev);



	return error;

}



int i915_resume(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
@@ -600,7 +610,20 @@ int i915_resume(struct drm_device *dev) 


	pci_set_master(dev->pdev);



	ret = i915_drm_thaw(dev);

	intel_gt_reset(dev);



	/*

	 * Platforms with opregion should have sane BIOS, older ones (gen3 and

	 * earlier) need this since the BIOS might clear all our scratch PTEs.

	 */

	if (drm_core_check_feature(dev, DRIVER_MODESET) &&

	    !dev_priv->opregion.header) {

		mutex_lock(&dev->struct_mutex);

		i915_gem_restore_gtt_mappings(dev);

		mutex_unlock(&dev->struct_mutex);

	}



	ret = __i915_drm_thaw(dev);

	if (ret)

		return ret;

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