Commit 1a501c8d authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and...

Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next

 - Make devm_of_clk_add_hw_provider() use parent dt node if necessary
 - Various SPDX taggings
 - Mark clk_ops const when possible

* clk-managed-registration:
  clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock
  clk: apcs-msm8916: simplify probe cleanup by using devm
  clk: clk-twl6040: Free of_provider at remove
  clk: rk808: use managed version of of_provider registration
  clk: clk-hi655x: Free of_provider at remove
  clk: of-provider: look at parent if registered device has no provider info
  clk: Add kerneldoc to managed of-provider interfaces

* clk-spdx:
  clk: Tag basic clk types with SPDX
  clk: Tag clk core files with SPDX
  clk: bcm2835: Switch to SPDX identifier

* clk-remove-basic:
  clk: Loongson1: Remove usage of CLK_IS_BASIC
  clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC
  clk: versatile: sp810: Remove usage of CLK_IS_BASIC
  clk: hisilicon: Remove usage of CLK_IS_BASIC
  clk: h8300: Remove usage of CLK_IS_BASIC
  clk: axm5516: Remove usage of CLK_IS_BASIC
  clk: st: Remove usage of CLK_IS_BASIC
  clk: renesas: Remove usage of CLK_IS_BASIC

* clk-ops-const:
  clk: s2mps11: constify clk_ops structure
  clk: pxa: constify clk_ops structures
  clk: pistachio: constify clk_ops structures
  clk: palmas: constify clk_ops structure
  clk: max77686: constify clk_ops structure
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@@ -283,6 +283,13 @@ config COMMON_CLK_STM32H7
	---help---
	  Support for stm32h7 SoC family clocks

config COMMON_CLK_BD718XX
	tristate "Clock driver for ROHM BD718x7 PMIC"
	depends on MFD_ROHM_BD718XX
	help
	  This driver supports ROHM BD71837 and ROHM BD71847
	  PMICs clock gates.

source "drivers/clk/actions/Kconfig"
source "drivers/clk/bcm/Kconfig"
source "drivers/clk/hisilicon/Kconfig"
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@@ -21,6 +21,7 @@ endif
obj-$(CONFIG_MACH_ASM9260)		+= clk-asm9260.o
obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)	+= clk-axi-clkgen.o
obj-$(CONFIG_ARCH_AXXIA)		+= clk-axm5516.o
obj-$(CONFIG_COMMON_CLK_BD718XX)	+= clk-bd718x7.o
obj-$(CONFIG_COMMON_CLK_CDCE706)	+= clk-cdce706.o
obj-$(CONFIG_COMMON_CLK_CDCE925)	+= clk-cdce925.o
obj-$(CONFIG_ARCH_CLPS711X)		+= clk-clps711x.o
+1 −10
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// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015 Broadcom
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/clk.h>
+1 −11
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// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2010,2015 Broadcom
 * Copyright (C) 2012 Stephen Warren
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

/**
+0 −2
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@@ -311,7 +311,6 @@ static struct axxia_divclk clk_per_div = {
			"clk_sm1_pll"
		},
		.num_parents = 1,
		.flags = CLK_IS_BASIC,
		.ops = &axxia_divclk_ops,
	},
	.reg   = 0x1000c,
@@ -326,7 +325,6 @@ static struct axxia_divclk clk_mmc_div = {
			"clk_sm1_pll"
		},
		.num_parents = 1,
		.flags = CLK_IS_BASIC,
		.ops = &axxia_divclk_ops,
	},
	.reg   = 0x1000c,
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