Commit 1a4d5a3e authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Mark Brown
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regulator: ti-abb: DT spelling s/#{address,size}-cell/#{address,size}-cells/

parent f55532a0
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+5 −5
Original line number Diff line number Diff line
@@ -14,8 +14,8 @@ Required Properties:
  - "setup-address"	- contains setup register address of ABB module (ti,abb-v3)
  - "int-address"	- contains address of interrupt register for ABB module
  (also see Optional properties)
- #address-cell: should be 0
- #size-cell: should be 0
- #address-cells: should be 0
- #size-cells: should be 0
- clocks: should point to the clock node used by ABB module
- ti,settling-time: Settling time in uSecs from SoC documentation for ABB module
	to settle down(target time for SR2_WTCNT_VALUE).
@@ -69,7 +69,7 @@ Example #1: Simplest configuration (no efuse data, hard coded ABB table):
abb_x: regulator-abb-x {
	compatible = "ti,abb-v1";
	regulator-name = "abb_x";
	#address-cell = <0>;
	#address-cells = <0>;
	#size-cells = <0>;
	reg = <0x483072f0 0x8>, <0x48306818 0x4>;
	reg-names = "base-address", "int-address";
@@ -89,7 +89,7 @@ Example #2: Efuse bits contain ABB mode setting (no LDO override capability)
abb_y: regulator-abb-y {
	compatible = "ti,abb-v2";
	regulator-name = "abb_y";
	#address-cell = <0>;
	#address-cells = <0>;
	#size-cells = <0>;
	reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>, <0x4A002268 0x8>;
	reg-names = "base-address", "int-address", "efuse-address";
@@ -110,7 +110,7 @@ Example #3: Efuse bits contain ABB mode setting and LDO override capability
abb_z: regulator-abb-z {
	compatible = "ti,abb-v2";
	regulator-name = "abb_z";
	#address-cell = <0>;
	#address-cells = <0>;
	#size-cells = <0>;
	reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
	      <0x4a002194 0x8>, <0x4ae0C314 0x4>;