Commit 1a209516 authored by Benoit Parrot's avatar Benoit Parrot Committed by Tony Lindgren
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ARM: dts: dra7: Add ti-sysc node for VPE



Add VPE node as a child of l4 interconnect in order for it to probe
using ti-sysc.

Signed-off-by: default avatarBenoit Parrot <bparrot@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 79312524
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+25 −3
Original line number Diff line number Diff line
@@ -4220,12 +4220,34 @@
			status = "disabled";
		};

		target-module@1d0000 {			/* 0x489d0000, ap 27 30.0 */
			compatible = "ti,sysc";
			status = "disabled";
		target-module@1d0010 {			/* 0x489d0000, ap 27 30.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x1d0010 0x4>;
			reg-names = "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x1d0000 0x10000>;

			vpe: vpe@0 {
				compatible = "ti,dra7-vpe";
				reg = <0x0000 0x120>,
				      <0x0700 0x80>,
				      <0x5700 0x18>,
				      <0xd000 0x400>;
				reg-names = "vpe_top",
					    "sc",
					    "csc",
					    "vpdma";
				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
			};
		};
	};
};