Commit 19b522db authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 fixes from Will Deacon:
 "Nothing too bad, but the spectre updates to smatch identified a few
  places that may need sanitising so we've got those covered.

  Details:

   - Close some potential spectre-v1 vulnerabilities found by smatch

   - Add missing list sentinel for CPUs that don't require KPTI

   - Removal of unused 'addr' parameter for I/D cache coherency

   - Removal of redundant set_fs(KERNEL_DS) calls in ptrace

   - Fix single-stepping state machine handling in response to kernel
     traps

   - Clang support for 128-bit integers

   - Avoid instrumenting our out-of-line atomics in preparation for
     enabling LSE atomics by default in 4.18"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: avoid instrumenting atomic_ll_sc.o
  KVM: arm/arm64: vgic: fix possible spectre-v1 in vgic_mmio_read_apr()
  KVM: arm/arm64: vgic: fix possible spectre-v1 in vgic_get_irq()
  arm64: fix possible spectre-v1 in ptrace_hbp_get_event()
  arm64: support __int128 with clang
  arm64: only advance singlestep for user instruction traps
  arm64/kernel: rename module_emit_adrp_veneer->module_emit_veneer_for_adrp
  arm64: ptrace: remove addr_limit manipulation
  arm64: mm: drop addr parameter from sync icache and dcache
  arm64: add sentinel to kpti_safe_list
parents 7b87308e 3789c122

arch/arm64/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -56,7 +56,11 @@ KBUILD_AFLAGS += $(lseinstr) $(brokengasinst) 
KBUILD_CFLAGS	+= $(call cc-option,-mabi=lp64)

KBUILD_AFLAGS	+= $(call cc-option,-mabi=lp64)



ifeq ($(cc-name),clang)

KBUILD_CFLAGS	+= -DCONFIG_ARCH_SUPPORTS_INT128

else

KBUILD_CFLAGS	+= $(call cc-ifversion, -ge, 0500, -DCONFIG_ARCH_SUPPORTS_INT128)

endif



ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)

KBUILD_CPPFLAGS	+= -mbig-endian

arch/arm64/include/asm/module.h

+1 −1
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ struct mod_arch_specific { 
u64 module_emit_plt_entry(struct module *mod, void *loc, const Elf64_Rela *rela,

			  Elf64_Sym *sym);



u64 module_emit_adrp_veneer(struct module *mod, void *loc, u64 val);

u64 module_emit_veneer_for_adrp(struct module *mod, void *loc, u64 val);



#ifdef CONFIG_RANDOMIZE_BASE

extern u64 module_alloc_base;

arch/arm64/include/asm/pgtable.h

+2 −2
Original line number Diff line number Diff line
@@ -230,7 +230,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte) 
	}

}



extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);

extern void __sync_icache_dcache(pte_t pteval);



/*

 * PTE bits configuration in the presence of hardware Dirty Bit Management
@@ -253,7 +253,7 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 
	pte_t old_pte;



	if (pte_present(pte) && pte_user_exec(pte) && !pte_special(pte))

		__sync_icache_dcache(pte, addr);

		__sync_icache_dcache(pte);



	/*

	 * If the existing pte is valid, check for potential race with

arch/arm64/kernel/cpufeature.c

+1 −0
Original line number Diff line number Diff line
@@ -868,6 +868,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, 
	static const struct midr_range kpti_safe_list[] = {

		MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),

		MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),

		{ /* sentinel */ }

	};

	char const *str = "command line option";

arch/arm64/kernel/module-plts.c

+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ u64 module_emit_plt_entry(struct module *mod, void *loc, const Elf64_Rela *rela, 
}



#ifdef CONFIG_ARM64_ERRATUM_843419

u64 module_emit_adrp_veneer(struct module *mod, void *loc, u64 val)

u64 module_emit_veneer_for_adrp(struct module *mod, void *loc, u64 val)

{

	struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core :

							  &mod->arch.init;

CRA Git | Maintained and supported by SUSTech CRA and CCSE