ath9k: remove MIB interrupt support (198823fd) · Commits · 戴 / test

drivers/net/wireless/ath/ath9k/ani.c

+0 −40

Original line number	Diff line number	Diff line
		@@ -490,46 +490,6 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
		}
		EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);

		/*
		* Process a MIB interrupt. We may potentially be invoked because
		* any of the MIB counters overflow/trigger so don't assume we're
		* here because a PHY error counter triggered.
		*/
		void ath9k_hw_proc_mib_event(struct ath_hw *ah)
		{
		u32 phyCnt1, phyCnt2;

		/* Reset these counters regardless */
		REG_WRITE(ah, AR_FILT_OFDM, 0);
		REG_WRITE(ah, AR_FILT_CCK, 0);
		if (!(REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING))
		REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);

		/* Clear the mib counters and save them in the stats */
		ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);

		if (!DO_ANI(ah)) {
		/*
		* We must always clear the interrupt cause by
		* resetting the phy error regs.
		*/
		REG_WRITE(ah, AR_PHY_ERR_1, 0);
		REG_WRITE(ah, AR_PHY_ERR_2, 0);
		return;
		}

		/* NB: these are not reset-on-read */
		phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
		phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
		if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) \|\|
		((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {

		/* NB: always restart to insure the h/w counters are reset */
		ath9k_ani_restart(ah);
		}
		}
		EXPORT_SYMBOL(ath9k_hw_proc_mib_event);

		void ath9k_hw_ani_setup(struct ath_hw *ah)
		{
		int i;

+0 −2

Original line number	Diff line number	Diff line
		@@ -348,8 +348,6 @@ void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status)
		sc->debug.stats.istats.txok++;
		if (status & ATH9K_INT_TXURN)
		sc->debug.stats.istats.txurn++;
		if (status & ATH9K_INT_MIB)
		sc->debug.stats.istats.mib++;
		if (status & ATH9K_INT_RXPHY)
		sc->debug.stats.istats.rxphyerr++;
		if (status & ATH9K_INT_RXKCM)

+0 −1

Original line number	Diff line number	Diff line
		@@ -1021,7 +1021,6 @@ void ar9003_hw_attach_ops(struct ath_hw *ah);
		void ar9002_hw_load_ani_reg(struct ath_hw ah, struct ath9k_channel chan);

		void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning);
		void ath9k_hw_proc_mib_event(struct ath_hw *ah);
		void ath9k_hw_ani_monitor(struct ath_hw ah, struct ath9k_channel chan);

		#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT

+2 −24

Original line number	Diff line number	Diff line
		@@ -516,24 +516,6 @@ irqreturn_t ath_isr(int irq, void *dev)
		ath9k_hw_set_interrupts(ah);
		}

		if (status & ATH9K_INT_MIB) {
		/*
		* Disable interrupts until we service the MIB
		* interrupt; otherwise it will continue to
		* fire.
		*/
		ath9k_hw_disable_interrupts(ah);
		/*
		* Let the hal handle the event. We assume
		* it will clear whatever condition caused
		* the interrupt.
		*/
		spin_lock(&common->cc_lock);
		ath9k_hw_proc_mib_event(ah);
		spin_unlock(&common->cc_lock);
		ath9k_hw_enable_interrupts(ah);
		}

		if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
		if (status & ATH9K_INT_TIM_TIMER) {
		if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
		@@ -959,14 +941,10 @@ static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
		/*
		* Enable MIB interrupts when there are hardware phy counters.
		*/
		if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
		if (ah->config.enable_ani)
		ah->imask \|= ATH9K_INT_MIB;
		if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
		ah->imask \|= ATH9K_INT_TSFOOR;
		} else {
		ah->imask &= ~ATH9K_INT_MIB;
		else
		ah->imask &= ~ATH9K_INT_TSFOOR;
		}

		ath9k_hw_set_interrupts(ah);