Commit 198016e1 authored by Sascha Hauer's avatar Sascha Hauer
Browse files

[ARM] MXC: add cpu_is_ macros 



We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent c0a5f855

arch/arm/mach-mx3/clock.c

+2 −0
Original line number Diff line number Diff line
@@ -1077,6 +1077,8 @@ int __init mx31_clocks_init(unsigned long fref) 
	u32 reg;

	struct clk **clkp;



	mxc_set_cpu_type(MXC_CPU_MX31);



	ckih_rate = fref;



	for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++)

arch/arm/plat-mxc/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ 
#



# Common support

obj-y := irq.o clock.o gpio.o time.o devices.o

obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o



obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o

obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o

arch/arm/plat-mxc/cpu.c

0 → 100644
+11 −0
Original line number Diff line number Diff line 


#include <linux/module.h>



unsigned int __mxc_cpu_type;

EXPORT_SYMBOL(__mxc_cpu_type);



void mxc_set_cpu_type(unsigned int type)

{

	__mxc_cpu_type = type;

}

arch/arm/plat-mxc/include/mach/common.h

+1 −0
Original line number Diff line number Diff line
@@ -23,5 +23,6 @@ extern int mx27_clocks_init(unsigned long fref); 
extern int mx31_clocks_init(unsigned long fref);

extern int mxc_register_gpios(void);

extern int mxc_register_device(struct platform_device *pdev, void *data);

extern void mxc_set_cpu_type(unsigned int type);



#endif

arch/arm/plat-mxc/include/mach/mx21.h

+0 −3
Original line number Diff line number Diff line
@@ -54,9 +54,6 @@ 


#define IRAM_BASE_ADDR          0xFFFFE800	/* internal ram */



/* this is an i.MX21 CPU */

#define cpu_is_mx21()		(1)



/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */

#define ARCH_NR_GPIOS		(6*32 + 16)

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