Commit 19778dd5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull IOMMU updates from Will Deacon:
 "There's a good mixture of improvements to the core code and driver
  changes across the board.

  One thing worth pointing out is that this includes a quirk to work
  around behaviour in the i915 driver (see 65f746e8 ("iommu: Add
  quirk for Intel graphic devices in map_sg")), which otherwise
  interacts badly with the conversion of the intel IOMMU driver over to
  the DMA-IOMMU APU but has being fixed properly in the DRM tree.

  We'll revert the quirk later this cycle once we've confirmed that
  things don't fall apart without it.

  Summary:

   - IOVA allocation optimisations and removal of unused code

   - Introduction of DOMAIN_ATTR_IO_PGTABLE_CFG for parameterising the
     page-table of an IOMMU domain

   - Support for changing the default domain type in sysfs

   - Optimisation to the way in which identity-mapped regions are
     created

   - Driver updates:
       * Arm SMMU updates, including continued work on Shared Virtual
         Memory
       * Tegra SMMU updates, including support for PCI devices
       * Intel VT-D updates, including conversion to the IOMMU-DMA API

   - Cleanup, kerneldoc and minor refactoring"

* tag 'iommu-updates-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (50 commits)
  iommu/amd: Add sanity check for interrupt remapping table length macros
  dma-iommu: remove __iommu_dma_mmap
  iommu/io-pgtable: Remove tlb_flush_leaf
  iommu: Stop exporting free_iova_mem()
  iommu: Stop exporting alloc_iova_mem()
  iommu: Delete split_and_remove_iova()
  iommu/io-pgtable-arm: Remove unused 'level' parameter from iopte_type() macro
  iommu: Defer the early return in arm_(v7s/lpae)_map
  iommu: Improve the performance for direct_mapping
  iommu: avoid taking iova_rbtree_lock twice
  iommu/vt-d: Avoid GFP_ATOMIC where it is not needed
  iommu/vt-d: Remove set but not used variable
  iommu: return error code when it can't get group
  iommu: Fix htmldocs warnings in sysfs-kernel-iommu_groups
  iommu: arm-smmu-impl: Add a space before open parenthesis
  iommu: arm-smmu-impl: Use table to list QCOM implementations
  iommu/arm-smmu: Move non-strict mode to use io_pgtable_domain_attr
  iommu/arm-smmu: Add support for pagetable config domain attribute
  iommu: Document usage of "/sys/kernel/iommu_groups/<grp_id>/type" file
  iommu: Take lock before reading iommu group default domain type
  ...
parents 007c74e1 5ae9a046
Loading
Loading
Loading
Loading
+30 −0
Original line number Diff line number Diff line
@@ -33,3 +33,33 @@ Description: In case an RMRR is used only by graphics or USB devices
		it is now exposed as "direct-relaxable" instead of "direct".
		In device assignment use case, for instance, those RMRR
		are considered to be relaxable and safe.

What:		/sys/kernel/iommu_groups/<grp_id>/type
Date:		November 2020
KernelVersion:	v5.11
Contact:	Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Description:	/sys/kernel/iommu_groups/<grp_id>/type shows the type of default
		domain in use by iommu for this group. See include/linux/iommu.h
		for possible read values. A privileged user could request kernel to
		change the group type by writing to this file. Valid write values:

		========  ======================================================
		DMA       All the DMA transactions from the device in this group
		          are translated by the iommu.
		identity  All the DMA transactions from the device in this group
		          are not translated by the iommu.
		auto      Change to the type the device was booted with.
		========  ======================================================

		The default domain type of a group may be modified only when

		- The group has only one device.
		- The device in the group is not bound to any device driver.
		  So, the users must unbind the appropriate driver before
		  changing the default domain type.

		Unbinding a device driver will take away the driver's control
		over the device and if done on devices that host root file
		system could lead to catastrophic effects (the users might
		need to reboot the machine to get it to normal state). So, it's
		expected that the users understand what they're doing.
+0 −5
Original line number Diff line number Diff line
@@ -1883,11 +1883,6 @@
			Note that using this option lowers the security
			provided by tboot because it makes the system
			vulnerable to DMA attacks.
		nobounce [Default off]
			Disable bounce buffer for untrusted devices such as
			the Thunderbolt devices. This will treat the untrusted
			devices as the trusted ones, hence might expose security
			risks of DMA attacks.

	intel_idle.max_cstate=	[KNL,HW,ACPI,X86]
			0	disables intel_idle and fall back on acpi_idle.
+7 −2
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ properties:
          - enum:
              - qcom,msm8996-smmu-v2
              - qcom,msm8998-smmu-v2
              - qcom,sc7180-smmu-v2
              - qcom,sdm845-smmu-v2
          - const: qcom,smmu-v2

      - description: Qcom SoCs implementing "arm,mmu-500"
@@ -40,6 +38,13 @@ properties:
              - qcom,sm8150-smmu-500
              - qcom,sm8250-smmu-500
          - const: arm,mmu-500
      - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
        items:
          - enum:
              - qcom,sc7180-smmu-v2
              - qcom,sdm845-smmu-v2
          - const: qcom,adreno-smmu
          - const: qcom,smmu-v2
      - description: Marvell SoCs implementing "arm,mmu-500"
        items:
          - const: marvell,ap806-smmu-500
+0 −1
Original line number Diff line number Diff line
@@ -139,7 +139,6 @@ static void msm_iommu_tlb_add_page(struct iommu_iotlb_gather *gather,
static const struct iommu_flush_ops null_tlb_ops = {
	.tlb_flush_all = msm_iommu_tlb_flush_all,
	.tlb_flush_walk = msm_iommu_tlb_flush_walk,
	.tlb_flush_leaf = msm_iommu_tlb_flush_walk,
	.tlb_add_page = msm_iommu_tlb_add_page,
};

+0 −7
Original line number Diff line number Diff line
@@ -347,16 +347,9 @@ static void mmu_tlb_flush_walk(unsigned long iova, size_t size, size_t granule,
	mmu_tlb_sync_context(cookie);
}

static void mmu_tlb_flush_leaf(unsigned long iova, size_t size, size_t granule,
			       void *cookie)
{
	mmu_tlb_sync_context(cookie);
}

static const struct iommu_flush_ops mmu_tlb_ops = {
	.tlb_flush_all	= mmu_tlb_inv_context_s1,
	.tlb_flush_walk = mmu_tlb_flush_walk,
	.tlb_flush_leaf = mmu_tlb_flush_leaf,
};

int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
Loading