drm/amdgpu: enable SI DPM (1919696e) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -30,7 +30,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
		ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o \
		amdgpu_amdkfd_gfx_v7.o

		amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o
		amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o

		amdgpu-y += \
		vi.o

+10 −0

Original line number	Diff line number	Diff line
		@@ -30,6 +30,7 @@
		#include "amdgpu_pm.h"
		#include <drm/amdgpu_drm.h>
		#include "amdgpu_powerplay.h"
		#include "si_dpm.h"
		#include "cik_dpm.h"
		#include "vi_dpm.h"

		@@ -59,6 +60,15 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
		amd_pp->pp_handle = (void *)adev;

		switch (adev->asic_type) {
		#ifdef CONFIG_DRM_AMDGPU_SI
		case CHIP_TAHITI:
		case CHIP_PITCAIRN:
		case CHIP_VERDE:
		case CHIP_OLAND:
		case CHIP_HAINAN:
		amd_pp->ip_funcs = &si_dpm_ip_funcs;
		break;
		#endif
		#ifdef CONFIG_DRM_AMDGPU_CIK
		case CHIP_BONAIRE:
		case CHIP_HAWAII:

+4 −4

Original line number	Diff line number	Diff line
		@@ -1117,6 +1117,7 @@ static u32 si_get_xclk(struct amdgpu_device *adev)

		return reference_clock;
		}

		//xxx:not implemented
		static int si_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk)
		{
		@@ -1850,14 +1851,13 @@ static const struct amdgpu_ip_block_version verde_ip_blocks[] =
		.rev = 0,
		.funcs = &si_ih_ip_funcs,
		},
		/* {
		{
		.type = AMD_IP_BLOCK_TYPE_SMC,
		.major = 6,
		.minor = 0,
		.rev = 0,
		.funcs = &si_null_ip_funcs,
		.funcs = &amdgpu_pp_ip_funcs,
		},
		*/
		{
		.type = AMD_IP_BLOCK_TYPE_DCE,
		.major = 6,
		@@ -1925,7 +1925,7 @@ static const struct amdgpu_ip_block_version hainan_ip_blocks[] =
		.major = 6,
		.minor = 0,
		.rev = 0,
		.funcs = &si_null_ip_funcs,
		.funcs = &amdgpu_pp_ip_funcs,
		},
		{
		.type = AMD_IP_BLOCK_TYPE_GFX,