Commit 18dcd79d authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Tony Lindgren
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ARM: dts: dra7: Add dt data for PCIe controller 



Added dt data for PCIe controller. This node contains dt data for
both the DRA7 part of designware controller and for the designware core.
The documention for this node can be found @ ../bindings/pci/ti-pci.txt.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 692df0ef

arch/arm/boot/dts/dra7.dtsi

+69 −0
Original line number Diff line number Diff line
@@ -99,6 +99,75 @@ 
			};

		};



		axi@0 {

			compatible = "simple-bus";

			#size-cells = <1>;

			#address-cells = <1>;

			ranges = <0x51000000 0x51000000 0x3000

				  0x0	     0x20000000 0x10000000>;

			pcie@51000000 {

				compatible = "ti,dra7-pcie";

				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;

				reg-names = "rc_dbics", "ti_conf", "config";

				interrupts = <0 232 0x4>, <0 233 0x4>;

				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				ranges = <0x81000000 0 0          0x03000 0 0x00010000

					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;

				#interrupt-cells = <1>;

				num-lanes = <1>;

				ti,hwmods = "pcie1";

				phys = <&pcie1_phy>;

				phy-names = "pcie-phy0";

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie1_intc 1>,

						<0 0 0 2 &pcie1_intc 2>,

						<0 0 0 3 &pcie1_intc 3>,

						<0 0 0 4 &pcie1_intc 4>;

				pcie1_intc: interrupt-controller {

					interrupt-controller;

					#address-cells = <0>;

					#interrupt-cells = <1>;

				};

			};

		};



		axi@1 {

			compatible = "simple-bus";

			#size-cells = <1>;

			#address-cells = <1>;

			ranges = <0x51800000 0x51800000 0x3000

				  0x0	     0x30000000 0x10000000>;

			status = "disabled";

			pcie@51000000 {

				compatible = "ti,dra7-pcie";

				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;

				reg-names = "rc_dbics", "ti_conf", "config";

				interrupts = <0 355 0x4>, <0 356 0x4>;

				#address-cells = <3>;

				#size-cells = <2>;

				device_type = "pci";

				ranges = <0x81000000 0 0          0x03000 0 0x00010000

					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;

				#interrupt-cells = <1>;

				num-lanes = <1>;

				ti,hwmods = "pcie2";

				phys = <&pcie2_phy>;

				phy-names = "pcie-phy0";

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie2_intc 1>,

						<0 0 0 2 &pcie2_intc 2>,

						<0 0 0 3 &pcie2_intc 3>,

						<0 0 0 4 &pcie2_intc 4>;

				pcie2_intc: interrupt-controller {

					interrupt-controller;

					#address-cells = <0>;

					#interrupt-cells = <1>;

				};

			};

		};



		cm_core_aon: cm_core_aon@4a005000 {

			compatible = "ti,dra7-cm-core-aon";

			reg = <0x4a005000 0x2000>;

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