drm/i915: Clean up skl_plane_has_planar() (18563409) · Commits · 戴 / test

skl_plane_has_planar is hard to read, simplify the logic by checking for support in the order of platform, pipe and plane. No change in functionality intended. v2: Fix logic for primary plane (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:

Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by:

Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:

Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180827225624.4912-1-dhinakaran.pandiyan@intel.com

drivers/gpu/drm/i915/intel_display.c

+9 −18

Original line number	Diff line number	Diff line
		@@ -13619,24 +13619,15 @@ static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,
		bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
		enum pipe pipe, enum plane_id plane_id)
		{
		if (plane_id == PLANE_PRIMARY) {
		if (IS_SKYLAKE(dev_priv) \|\| IS_BROXTON(dev_priv))
		return false;
		else if ((INTEL_GEN(dev_priv) == 9 && pipe == PIPE_C) &&
		!IS_GEMINILAKE(dev_priv))
		return false;
		} else if (plane_id >= PLANE_SPRITE0) {
		if (plane_id == PLANE_CURSOR)
		return false;
		if (IS_GEMINILAKE(dev_priv) \|\| INTEL_GEN(dev_priv) == 10) {
		if (plane_id != PLANE_SPRITE0)

		if (INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C)
		return false;
		} else {
		if (plane_id != PLANE_SPRITE0 \|\| pipe == PIPE_C \|\|
		IS_SKYLAKE(dev_priv) \|\| IS_BROXTON(dev_priv))

		if (plane_id != PLANE_PRIMARY && plane_id != PLANE_SPRITE0)
		return false;
		}
		}

		return true;
		}

Admin message