Commit 1837649f authored by Punnaiah Choudary Kalluri's avatar Punnaiah Choudary Kalluri Committed by Michal Simek
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Documentation: devicetree: Add ECC information to synopsys ddr controller 



Add ECC information to synopsys ddr memory controller.

Signed-off-by: default avatarPunnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 6835fe48

Documentation/devicetree/bindings/memory-controllers/synopsys.txt

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Binding for Synopsys IntelliDDR Multi Protocol Memory Controller



This controller has an optional ECC support in half-bus width (16-bit)

configuration. The ECC controller corrects one bit error and detects

two bit errors.



Required properties:

 - compatible: Should be 'xlnx,zynq-ddrc-a05'

 - reg: Base address and size of the controllers memory area

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