Commit 1825fd34 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Switch the custom "max bpc" property to the DRM prop 



[Why]
The custom "max bpc" property was added to limit color depth while the
DRM one was still being merged. It's been a few kernel versions since
then and this TODO was still sticking around.

[How]
Attach the DRM max bpc property to the connector and drop all of our
custom property management. Set the max bpc to 8 by default since
DRM defaults to the max in the range which would be 16 in this case.

No behavioral changes are intended with this patch, it should just be
a refactor.

v2: Don't force 8bpc when no state is given

Cc: Leo Li <sunpeng.li@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a7517677

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+0 −4
Original line number Diff line number Diff line
@@ -631,10 +631,6 @@ int amdgpu_display_modeset_create_props(struct amdgpu_device *adev) 
					 amdgpu_dither_enum_list, sz);



	if (amdgpu_device_has_dc_support(adev)) {

		adev->mode_info.max_bpc_property =

			drm_property_create_range(adev->ddev, 0, "max bpc", 8, 16);

		if (!adev->mode_info.max_bpc_property)

			return -ENOMEM;

		adev->mode_info.abm_level_property =

			drm_property_create_range(adev->ddev, 0,

						"abm level", 0, 4);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

+0 −2
Original line number Diff line number Diff line
@@ -331,8 +331,6 @@ struct amdgpu_mode_info { 
	struct drm_property *audio_property;

	/* FMT dithering */

	struct drm_property *dither_property;

	/* maximum number of bits per channel for monitor color */

	struct drm_property *max_bpc_property;

	/* Adaptive Backlight Modulation (power feature) */

	struct drm_property *abm_level_property;

	/* hardcoded DFP edid from BIOS */

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+12 −17
Original line number Diff line number Diff line
@@ -2969,14 +2969,14 @@ static void update_stream_scaling_settings(const struct drm_display_mode *mode, 
static enum dc_color_depth

convert_color_depth_from_display_info(const struct drm_connector *connector)

{

	struct dm_connector_state *dm_conn_state =

		to_dm_connector_state(connector->state);

	uint32_t bpc = connector->display_info.bpc;



	/* TODO: Remove this when there's support for max_bpc in drm */

	if (dm_conn_state && bpc > dm_conn_state->max_bpc)

		/* Round down to nearest even number. */

		bpc = dm_conn_state->max_bpc - (dm_conn_state->max_bpc & 1);

	/* TODO: Use passed in state instead of the current state. */

	if (connector->state) {

		bpc = connector->state->max_bpc;

		/* Round down to the nearest even number. */

		bpc = bpc - (bpc & 1);

	}



	switch (bpc) {

	case 0:
@@ -3618,9 +3618,6 @@ int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connector, 
	} else if (property == adev->mode_info.underscan_property) {

		dm_new_state->underscan_enable = val;

		ret = 0;

	} else if (property == adev->mode_info.max_bpc_property) {

		dm_new_state->max_bpc = val;

		ret = 0;

	} else if (property == adev->mode_info.abm_level_property) {

		dm_new_state->abm_level = val;

		ret = 0;
@@ -3666,9 +3663,6 @@ int amdgpu_dm_connector_atomic_get_property(struct drm_connector *connector, 
	} else if (property == adev->mode_info.underscan_property) {

		*val = dm_state->underscan_enable;

		ret = 0;

	} else if (property == adev->mode_info.max_bpc_property) {

		*val = dm_state->max_bpc;

		ret = 0;

	} else if (property == adev->mode_info.abm_level_property) {

		*val = dm_state->abm_level;

		ret = 0;
@@ -3725,7 +3719,6 @@ void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector) 
		state->underscan_enable = false;

		state->underscan_hborder = 0;

		state->underscan_vborder = 0;

		state->max_bpc = 8;



		__drm_atomic_helper_connector_reset(connector, &state->base);

	}
@@ -3751,7 +3744,6 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector) 
	new_state->underscan_enable = state->underscan_enable;

	new_state->underscan_hborder = state->underscan_hborder;

	new_state->underscan_vborder = state->underscan_vborder;

	new_state->max_bpc = state->max_bpc;



	return &new_state->base;

}
@@ -4672,9 +4664,12 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm, 
	drm_object_attach_property(&aconnector->base.base,

				adev->mode_info.underscan_vborder_property,

				0);

	drm_object_attach_property(&aconnector->base.base,

				adev->mode_info.max_bpc_property,

				0);



	drm_connector_attach_max_bpc_property(&aconnector->base, 8, 16);



	/* This defaults to the max in the range, but we want 8bpc. */

	aconnector->base.state->max_bpc = 8;

	aconnector->base.state->max_requested_bpc = 8;



	if (connector_type == DRM_MODE_CONNECTOR_eDP &&

	    dc_is_dmcu_initialized(adev->dm.dc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

+0 −1
Original line number Diff line number Diff line
@@ -304,7 +304,6 @@ struct dm_connector_state { 
	enum amdgpu_rmx_type scaling;

	uint8_t underscan_vborder;

	uint8_t underscan_hborder;

	uint8_t max_bpc;

	bool underscan_enable;

	bool freesync_capable;

	uint8_t abm_level;

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