Commit 17c1eb15 authored by Brad Volkin's avatar Brad Volkin Committed by Daniel Vetter
Browse files

drm/i915: Allow some privileged commands from master 



The Intel DDX uses these to implement scanline waits in the X server.

Signed-off-by: default avatarBrad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9c640d1d

drivers/gpu/drm/i915/i915_cmd_parser.c

+3 −3
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ 
static const struct drm_i915_cmd_descriptor common_cmds[] = {

	CMD(  MI_NOOP,                          SMI,    F,  1,      S  ),

	CMD(  MI_USER_INTERRUPT,                SMI,    F,  1,      S  ),

	CMD(  MI_WAIT_FOR_EVENT,                SMI,    F,  1,      R  ),

	CMD(  MI_WAIT_FOR_EVENT,                SMI,    F,  1,      M  ),

	CMD(  MI_ARB_CHECK,                     SMI,    F,  1,      S  ),

	CMD(  MI_REPORT_HEAD,                   SMI,    F,  1,      S  ),

	CMD(  MI_SUSPEND_FLUSH,                 SMI,    F,  1,      S  ),
@@ -151,7 +151,7 @@ static const struct drm_i915_cmd_descriptor hsw_render_cmds[] = { 
	CMD(  MI_RS_CONTROL,                    SMI,    F,  1,      S  ),

	CMD(  MI_URB_ATOMIC_ALLOC,              SMI,    F,  1,      S  ),

	CMD(  MI_RS_CONTEXT,                    SMI,    F,  1,      S  ),

	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   R  ),

	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   M  ),

	CMD(  MI_LOAD_SCAN_LINES_EXCL,          SMI,   !F,  0x3F,   R  ),

	CMD(  MI_LOAD_REGISTER_REG,             SMI,   !F,  0xFF,   R  ),

	CMD(  MI_RS_STORE_DATA_IMM,             SMI,   !F,  0xFF,   S  ),
@@ -196,7 +196,7 @@ static const struct drm_i915_cmd_descriptor blt_cmds[] = { 
};



static const struct drm_i915_cmd_descriptor hsw_blt_cmds[] = {

	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   R  ),

	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   M  ),

	CMD(  MI_LOAD_SCAN_LINES_EXCL,          SMI,   !F,  0x3F,   R  ),

};

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