Commit 17795bf9 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-dt64-tmu-5.5' of... 

Merge tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

LX2160A TMU support for 5.5:
 - Add TMU (Thermal Monitoring Unit) device node to enable thermal
   support on LX2160A SoC.

* tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: lx2160a: add tmu device node
  ARM: imx_v6_v7_defconfig: Enable CONFIG_DRM_MSM
  arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mm: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mq: Use correct clock for usdhc's ipg clk
  ARM: dts: imx7s: Correct GPT's ipg clock source
  ARM: dts: vf610-zii-scu4-aib: Specify 'i2c-mux-idle-disconnect'
  ARM: dts: imx6q-logicpd: Re-Enable SNVS power key
  arm64: dts: lx2160a: Correct CPU core idle state name
  arm64: dts: zii-ultra: fix ARM regulator states
  soc: imx: imx-scu: Getting UID from SCU should have response

Link: https://lore.kernel.org/r/20191105150315.15477-6-shawnguo@kernel.org


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 06e78df3 5363eaae

arch/arm/boot/dts/imx6-logicpd-som.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -207,6 +207,10 @@ 
	vin-supply = <&sw1c_reg>;

};



&snvs_poweroff {

	status = "okay";

};



&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_hog>;

arch/arm/boot/dts/imx7s.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -448,7 +448,7 @@ 
				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";

				reg = <0x302d0000 0x10000>;

				interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX7D_CLK_DUMMY>,

				clocks = <&clks IMX7D_GPT1_ROOT_CLK>,

					 <&clks IMX7D_GPT1_ROOT_CLK>;

				clock-names = "ipg", "per";

			};
@@ -457,7 +457,7 @@ 
				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";

				reg = <0x302e0000 0x10000>;

				interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX7D_CLK_DUMMY>,

				clocks = <&clks IMX7D_GPT2_ROOT_CLK>,

					 <&clks IMX7D_GPT2_ROOT_CLK>;

				clock-names = "ipg", "per";

				status = "disabled";
@@ -467,7 +467,7 @@ 
				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";

				reg = <0x302f0000 0x10000>;

				interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX7D_CLK_DUMMY>,

				clocks = <&clks IMX7D_GPT3_ROOT_CLK>,

					 <&clks IMX7D_GPT3_ROOT_CLK>;

				clock-names = "ipg", "per";

				status = "disabled";
@@ -477,7 +477,7 @@ 
				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";

				reg = <0x30300000 0x10000>;

				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX7D_CLK_DUMMY>,

				clocks = <&clks IMX7D_GPT4_ROOT_CLK>,

					 <&clks IMX7D_GPT4_ROOT_CLK>;

				clock-names = "ipg", "per";

				status = "disabled";

arch/arm/boot/dts/vf610-zii-scu4-aib.dts

+2 −0
Original line number Diff line number Diff line
@@ -592,6 +592,7 @@ 
		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x70>;

		i2c-mux-idle-disconnect;



		sff0_i2c: i2c@1 {

			#address-cells = <1>;
@@ -630,6 +631,7 @@ 
		reg = <0x71>;

		#address-cells = <1>;

		#size-cells = <0>;

		i2c-mux-idle-disconnect;



		sff5_i2c: i2c@1 {

			#address-cells = <1>;

arch/arm/configs/imx_v6_v7_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -276,6 +276,7 @@ CONFIG_VIDEO_OV5640=m 
CONFIG_VIDEO_OV5645=m

CONFIG_IMX_IPUV3_CORE=y

CONFIG_DRM=y

CONFIG_DRM_MSM=y

CONFIG_DRM_PANEL_LVDS=y

CONFIG_DRM_PANEL_SIMPLE=y

CONFIG_DRM_PANEL_SEIKO_43WVF1G=y

arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

+110 −34
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/thermal/thermal.h>



/memreserve/ 0x80000000 0x00010000;
@@ -20,7 +21,7 @@ 
		#size-cells = <0>;



		// 8 clusters having 2 Cortex-A72 cores each

		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -33,10 +34,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster0_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -49,10 +51,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster0_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@100 {

		cpu100: cpu@100 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -65,10 +68,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster1_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@101 {

		cpu101: cpu@101 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -81,10 +85,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster1_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@200 {

		cpu200: cpu@200 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -97,10 +102,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster2_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@201 {

		cpu201: cpu@201 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -113,10 +119,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster2_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@300 {

		cpu300: cpu@300 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -129,10 +136,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster3_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@301 {

		cpu301: cpu@301 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -145,10 +153,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster3_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@400 {

		cpu400: cpu@400 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -161,10 +170,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster4_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@401 {

		cpu401: cpu@401 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -177,10 +187,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster4_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@500 {

		cpu500: cpu@500 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -193,10 +204,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster5_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@501 {

		cpu501: cpu@501 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -209,10 +221,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster5_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@600 {

		cpu600: cpu@600 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -225,10 +238,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster6_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@601 {

		cpu601: cpu@601 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -241,10 +255,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster6_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@700 {

		cpu700: cpu@700 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -257,10 +272,11 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster7_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cpu@701 {

		cpu701: cpu@701 {

			device_type = "cpu";

			compatible = "arm,cortex-a72";

			enable-method = "psci";
@@ -273,7 +289,8 @@ 
			i-cache-line-size = <64>;

			i-cache-sets = <192>;

			next-level-cache = <&cluster7_l2>;

			cpu-idle-states = <&cpu_pw20>;

			cpu-idle-states = <&cpu_pw15>;

			#cooling-cells = <2>;

		};



		cluster0_l2: l2-cache0 {
@@ -340,9 +357,9 @@ 
			cache-level = <2>;

		};



		cpu_pw20: cpu-pw20 {

		cpu_pw15: cpu-pw15 {

			compatible = "arm,idle-state";

			idle-state-name = "PW20";

			idle-state-name = "PW15";

			arm,psci-suspend-param = <0x0>;

			entry-latency-us = <2000>;

			exit-latency-us = <2000>;
@@ -418,6 +435,51 @@ 
		clock-output-names = "sysclk";

	};



	thermal-zones {

		core_thermal1: core-thermal1 {

			polling-delay-passive = <1000>;

			polling-delay = <5000>;

			thermal-sensors = <&tmu 0>;



			trips {

				core_cluster_alert: core-cluster-alert {

					temperature = <85000>;

					hysteresis = <2000>;

					type = "passive";

				};



				core_cluster_crit: core-cluster-crit {

					temperature = <95000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&core_cluster_alert>;

					cooling-device =

						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu200 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu201 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu300 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu301 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu400 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu401 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu500 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu501 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu600 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu601 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu700 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu701 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <2>;
@@ -478,6 +540,20 @@ 
			little-endian;

		};



		tmu: tmu@1f80000 {

			compatible = "fsl,qoriq-tmu";

			reg = <0x0 0x1f80000 0x0 0x10000>;

			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

			fsl,tmu-range = <0x800000e6 0x8001017d>;

			fsl,tmu-calibration =

				/* Calibration data group 1 */

				<0x00000000 0x00000035

				/* Calibration data group 2 */

				0x00010001 0x00000154>;

			little-endian;

			#thermal-sensor-cells = <1>;

		};



		i2c0: i2c@2000000 {

			compatible = "fsl,vf610-i2c";

			#address-cells = <1>;

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