Commit 1759d322 authored by Parav Pandit's avatar Parav Pandit Committed by Saeed Mahameed
Browse files

net/mlx5: Add hardware definitions for sub functions 



Update mlx5 device interface data structures for:
1. New command definitions for allocating, deallocating SF
2. Query SF partition
3. Eswitch SF fields
4. HCA CAP SF fields
5. Extend Eswitch functions command for SF

Signed-off-by: default avatarParav Pandit <parav@mellanox.com>
Signed-off-by: default avatarVu Pham <vuhuong@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 92ab1eb3

include/linux/mlx5/mlx5_ifc.h

+96 −3
Original line number Diff line number Diff line
@@ -106,6 +106,9 @@ enum { 
	MLX5_CMD_OP_QUERY_ISSI                    = 0x10a,

	MLX5_CMD_OP_SET_ISSI                      = 0x10b,

	MLX5_CMD_OP_SET_DRIVER_VERSION            = 0x10d,

	MLX5_CMD_OP_QUERY_SF_PARTITION            = 0x111,

	MLX5_CMD_OP_ALLOC_SF                      = 0x113,

	MLX5_CMD_OP_DEALLOC_SF                    = 0x114,

	MLX5_CMD_OP_CREATE_MKEY                   = 0x200,

	MLX5_CMD_OP_QUERY_MKEY                    = 0x201,

	MLX5_CMD_OP_DESTROY_MKEY                  = 0x202,
@@ -713,7 +716,11 @@ struct mlx5_ifc_e_switch_cap_bits { 
	u8         reserved_2b[0x6];

	u8         max_encap_header_size[0xa];



	u8         reserved_40[0x7c0];

	u8         reserved_at_40[0xb];

	u8         log_max_esw_sf[0x5];

	u8         esw_sf_base_id[0x10];



	u8         reserved_at_60[0x7a0];



};
@@ -1330,13 +1337,24 @@ struct mlx5_ifc_cmd_hca_cap_bits { 
	u8         reserved_at_640[0x10];

	u8         num_q_monitor_counters[0x10];



	u8         reserved_at_660[0x40];

	u8         reserved_at_660[0x20];



	u8         sf[0x1];

	u8         sf_set_partition[0x1];

	u8         reserved_at_682[0x1];

	u8         log_max_sf[0x5];

	u8         reserved_at_688[0x8];

	u8         log_min_sf_size[0x8];

	u8         max_num_sf_partitions[0x8];



	u8         uctx_cap[0x20];



	u8         reserved_at_6c0[0x4];

	u8         flex_parser_id_geneve_tlv_option_0[0x4];

	u8         reserved_at_6c8[0x138];

	u8	   reserved_at_6c8[0x28];

	u8	   sf_base_id[0x10];



	u8	   reserved_at_700[0x100];

};



enum mlx5_flow_destination_type {
@@ -9786,6 +9804,81 @@ struct mlx5_ifc_query_esw_functions_out_bits { 
	struct mlx5_ifc_host_params_context_bits host_params_context;



	u8         reserved_at_280[0x180];

	u8         host_sf_enable[0][0x40];

};



struct mlx5_ifc_sf_partition_bits {

	u8         reserved_at_0[0x10];

	u8         log_num_sf[0x8];

	u8         log_sf_bar_size[0x8];

};



struct mlx5_ifc_query_sf_partitions_out_bits {

	u8         status[0x8];

	u8         reserved_at_8[0x18];



	u8         syndrome[0x20];



	u8         reserved_at_40[0x18];

	u8         num_sf_partitions[0x8];



	u8         reserved_at_60[0x20];



	struct mlx5_ifc_sf_partition_bits sf_partition[0];

};



struct mlx5_ifc_query_sf_partitions_in_bits {

	u8         opcode[0x10];

	u8         reserved_at_10[0x10];



	u8         reserved_at_20[0x10];

	u8         op_mod[0x10];



	u8         reserved_at_40[0x40];

};



struct mlx5_ifc_dealloc_sf_out_bits {

	u8         status[0x8];

	u8         reserved_at_8[0x18];



	u8         syndrome[0x20];



	u8         reserved_at_40[0x40];

};



struct mlx5_ifc_dealloc_sf_in_bits {

	u8         opcode[0x10];

	u8         reserved_at_10[0x10];



	u8         reserved_at_20[0x10];

	u8         op_mod[0x10];



	u8         reserved_at_40[0x10];

	u8         function_id[0x10];



	u8         reserved_at_60[0x20];

};



struct mlx5_ifc_alloc_sf_out_bits {

	u8         status[0x8];

	u8         reserved_at_8[0x18];



	u8         syndrome[0x20];



	u8         reserved_at_40[0x40];

};



struct mlx5_ifc_alloc_sf_in_bits {

	u8         opcode[0x10];

	u8         reserved_at_10[0x10];



	u8         reserved_at_20[0x10];

	u8         op_mod[0x10];



	u8         reserved_at_40[0x10];

	u8         function_id[0x10];



	u8         reserved_at_60[0x20];

};



#endif /* MLX5_IFC_H */

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