Commit 174b328b authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: remove distinction between explicit and implicit sync (v2) 



According to Marek a pipeline sync should be inserted for implicit syncs well.

v2: bump the driver version

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Tested-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 614c5611

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+4 −4
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync) 
	if (ret)

		return ret;



	return amdgpu_sync_fence(sync, vm->last_update, false);

	return amdgpu_sync_fence(sync, vm->last_update);

}



static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
@@ -785,7 +785,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev, 


	amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update);



	amdgpu_sync_fence(sync, bo_va->last_pt_update, false);

	amdgpu_sync_fence(sync, bo_va->last_pt_update);



	return 0;

}
@@ -804,7 +804,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev, 
		return ret;

	}



	return amdgpu_sync_fence(sync, bo_va->last_pt_update, false);

	return amdgpu_sync_fence(sync, bo_va->last_pt_update);

}



static int map_bo_to_gpuvm(struct amdgpu_device *adev,
@@ -2102,7 +2102,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef) 
			pr_debug("Memory eviction: Validate BOs failed. Try again\n");

			goto validate_map_fail;

		}

		ret = amdgpu_sync_fence(&sync_obj, bo->tbo.moving, false);

		ret = amdgpu_sync_fence(&sync_obj, bo->tbo.moving);

		if (ret) {

			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");

			goto validate_map_fail;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+2 −2
Original line number Diff line number Diff line
@@ -992,7 +992,7 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p, 
			dma_fence_put(old);

		}



		r = amdgpu_sync_fence(&p->job->sync, fence, true);

		r = amdgpu_sync_fence(&p->job->sync, fence);

		dma_fence_put(fence);

		if (r)

			return r;
@@ -1014,7 +1014,7 @@ static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p, 
		return r;

	}



	r = amdgpu_sync_fence(&p->job->sync, fence, true);

	r = amdgpu_sync_fence(&p->job->sync, fence);

	dma_fence_put(fence);



	return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -87,9 +87,10 @@ 
 * - 3.36.0 - Allow reading more status registers on si/cik

 * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness

 * - 3.38.0 - Add AMDGPU_IB_FLAG_EMIT_MEM_SYNC

 * - 3.39.0 - DMABUF implicit sync does a full pipeline sync

 */

#define KMS_DRIVER_MAJOR	3

#define KMS_DRIVER_MINOR	38

#define KMS_DRIVER_MINOR	39

#define KMS_DRIVER_PATCHLEVEL	0



int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

+1 −1
Original line number Diff line number Diff line
@@ -178,7 +178,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, 


	need_ctx_switch = ring->current_ctx != fence_ctx;

	if (ring->funcs->emit_pipeline_sync && job &&

	    ((tmp = amdgpu_sync_get_fence(&job->sched_sync, NULL)) ||

	    ((tmp = amdgpu_sync_get_fence(&job->sched_sync)) ||

	     (amdgpu_sriov_vf(adev) && need_ctx_switch) ||

	     amdgpu_vm_need_pipeline_sync(ring, job))) {

		need_pipe_sync = true;

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

+6 −6
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm, 
	int r;



	if (ring->vmid_wait && !dma_fence_is_signaled(ring->vmid_wait))

		return amdgpu_sync_fence(sync, ring->vmid_wait, false);

		return amdgpu_sync_fence(sync, ring->vmid_wait);



	fences = kmalloc_array(sizeof(void *), id_mgr->num_ids, GFP_KERNEL);

	if (!fences)
@@ -241,7 +241,7 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm, 
			return -ENOMEM;

		}



		r = amdgpu_sync_fence(sync, &array->base, false);

		r = amdgpu_sync_fence(sync, &array->base);

		dma_fence_put(ring->vmid_wait);

		ring->vmid_wait = &array->base;

		return r;
@@ -294,7 +294,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm, 
		tmp = amdgpu_sync_peek_fence(&(*id)->active, ring);

		if (tmp) {

			*id = NULL;

			r = amdgpu_sync_fence(sync, tmp, false);

			r = amdgpu_sync_fence(sync, tmp);

			return r;

		}

		needs_flush = true;
@@ -303,7 +303,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm, 
	/* Good we can use this VMID. Remember this submission as

	* user of the VMID.

	*/

	r = amdgpu_sync_fence(&(*id)->active, fence, false);

	r = amdgpu_sync_fence(&(*id)->active, fence);

	if (r)

		return r;
@@ -375,7 +375,7 @@ static int amdgpu_vmid_grab_used(struct amdgpu_vm *vm, 
		/* Good, we can use this VMID. Remember this submission as

		 * user of the VMID.

		 */

		r = amdgpu_sync_fence(&(*id)->active, fence, false);

		r = amdgpu_sync_fence(&(*id)->active, fence);

		if (r)

			return r;
@@ -435,7 +435,7 @@ int amdgpu_vmid_grab(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 
			id = idle;



			/* Remember this submission as user of the VMID */

			r = amdgpu_sync_fence(&id->active, fence, false);

			r = amdgpu_sync_fence(&id->active, fence);

			if (r)

				goto error;

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