Commit 16ee792e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-soc 

* 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits)
  ARM: tegra: update defconfig
  arm/tegra: Harmony: Configure PMC for low-level interrupts
  arm/tegra: device tree support for ventana board
  arm/tegra: add support for ventana pinmuxing
  arm/tegra: prepare Seaboard pinmux code for derived boards
  arm/tegra: pinmux: ioremap registers
  gpio/tegra: Convert to a platform device
  arm/tegra: Convert pinmux driver to a platform device
  arm/dt: Tegra: Add pinmux node to tegra20.dtsi
  arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
  ARM: mx5: fix clock usage for suspend
  ARM i.MX entry-macro.S: remove now unused code
  ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
  ARM i.MX tzic: add handle_irq function
  ARM i.MX avic: add handle_irq function
  ARM: mx25: Add the missing IIM base definition
  ARM i.MX avic: convert to use generic irq chip
  mx31moboard: Add poweroff support
  ARM: mach-qong: Add watchdog support
  ARM: davinci: AM18x: Add wl1271/wlan support
  ...

Fix up conflicts in:
	arch/arm/mach-at91/at91sam9g45.c
	arch/arm/mach-mx5/devices-imx53.h
	arch/arm/plat-mxc/include/mach/memory.h
parents f906fb1d efa62e13

Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt

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+5 −0
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NVIDIA Tegra 2 pinmux controller



Required properties:

- compatible : "nvidia,tegra20-pinmux"

arch/arm/Kconfig

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@@ -417,6 +417,7 @@ config ARCH_MXC 
	select CLKSRC_MMIO

	select GENERIC_IRQ_CHIP

	select HAVE_SCHED_CLOCK

	select MULTI_IRQ_HANDLER

	help

	  Support for Freescale MXC/iMX-based family of processors

arch/arm/Makefile

+1 −3
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@@ -157,9 +157,7 @@ machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx 
machine-$(CONFIG_ARCH_MMP)		:= mmp

machine-$(CONFIG_ARCH_MSM)		:= msm

machine-$(CONFIG_ARCH_MV78XX0)		:= mv78xx0

machine-$(CONFIG_ARCH_MX1)		:= imx

machine-$(CONFIG_ARCH_MX2)		:= imx

machine-$(CONFIG_ARCH_MX25)		:= imx

machine-$(CONFIG_ARCH_IMX_V4_V5)	:= imx

machine-$(CONFIG_ARCH_MX3)		:= imx

machine-$(CONFIG_ARCH_MX5)		:= mx5

machine-$(CONFIG_ARCH_MXS)		:= mxs

arch/arm/boot/dts/tegra-ventana.dts

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/dts-v1/;



/memreserve/ 0x1c000000 0x04000000;

/include/ "tegra20.dtsi"



/ {

	model = "NVIDIA Tegra2 Ventana evaluation board";

	compatible = "nvidia,ventana", "nvidia,tegra20";



	chosen {

		bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init";

	};



	memory {

		reg = < 0x00000000 0x40000000 >;

	};



	serial@70006300 {

		clock-frequency = < 216000000 >;

	};



	sdhci@c8000400 {

		cd-gpios = <&gpio 69 0>; /* gpio PI5 */

		wp-gpios = <&gpio 57 0>; /* gpio PH1 */

		power-gpios = <&gpio 155 0>; /* gpio PT3 */

	};



	sdhci@c8000600 {

		power-gpios = <&gpio 70 0>; /* gpio PI6 */

		support-8bit;

	};

};

arch/arm/boot/dts/tegra20.dtsi

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@@ -77,6 +77,14 @@ 
		gpio-controller;

	};



	pinmux: pinmux@70000000 {

		compatible = "nvidia,tegra20-pinmux";

		reg = < 0x70000014 0x10    /* Tri-state registers */

			0x70000080 0x20    /* Mux registers */

			0x700000a0 0x14    /* Pull-up/down registers */

			0x70000868 0xa8 >; /* Pad control registers */

	};



	serial@70006000 {

		compatible = "nvidia,tegra20-uart";

		reg = <0x70006000 0x40>;

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