iommu/vt-d: Set U/S bit in first level page table by default (16ecf10e) · Commits · 戴 / test

When using first-level translation for IOVA, currently the U/S bit in the page table is cleared which implies DMA requests with user privilege are blocked. As the result, following error messages might be observed when passing through a device to user level: DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read] Request device [41:00.0] PASID 1 fault addr 7ecdcd000 [fault reason 129] SM: U/S set 0 for first-level translation with user privilege This fixes it by setting U/S bit in the first level page table and makes IOVA over first level compatible with previous second-level translation. Fixes: ("iommu/vt-d: Use iova over first level") Reported-by:

Xin Zeng <xin.zeng@intel.com> Signed-off-by:

Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20200622231345.29722-3-baolu.lu@linux.intel.com Signed-off-by:

Joerg Roedel <jroedel@suse.de>

drivers/iommu/intel/iommu.c

+2 −3

Original line number	Diff line number	Diff line
		@@ -921,7 +921,7 @@ static struct dma_pte pfn_to_dma_pte(struct dmar_domain domain,
		domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE);
		pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) \| DMA_PTE_READ \| DMA_PTE_WRITE;
		if (domain_use_first_level(domain))
		pteval \|= DMA_FL_PTE_XD;
		pteval \|= DMA_FL_PTE_XD \| DMA_FL_PTE_US;
		if (cmpxchg64(&pte->val, 0ULL, pteval))
		/* Someone else set it while we were thinking; use theirs. */
		free_pgtable_page(tmp_page);
		@@ -1951,7 +1951,6 @@ static inline void
		context_set_sm_rid2pasid(struct context_entry *context, unsigned long pasid)
		{
		context->hi \|= pasid & ((1 << 20) - 1);
		context->hi \|= (1 << 20);
		}

		/*
		@@ -2243,7 +2242,7 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,

		attr = prot & (DMA_PTE_READ \| DMA_PTE_WRITE \| DMA_PTE_SNP);
		if (domain_use_first_level(domain))
		attr \|= DMA_FL_PTE_PRESENT \| DMA_FL_PTE_XD;
		attr \|= DMA_FL_PTE_PRESENT \| DMA_FL_PTE_XD \| DMA_FL_PTE_US;

		if (!sg) {
		sg_res = nr_pages;

include/linux/intel-iommu.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -41,6 +41,7 @@
		#define DMA_PTE_SNP BIT_ULL(11)

		#define DMA_FL_PTE_PRESENT BIT_ULL(0)
		#define DMA_FL_PTE_US BIT_ULL(2)
		#define DMA_FL_PTE_XD BIT_ULL(63)

		#define ADDR_WIDTH_5LEVEL (57)

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