Commit 16e69322 authored by Pekon Gupta's avatar Pekon Gupta Committed by Brian Norris
Browse files

mtd: nand: omap: ecc.hwctl: clean omap_enable_hwecc_bch for redundant ECC configs 



This patch
 - refactors GPMC configurations based on ecc-scheme
 - removed dependency on is_elm_present() flag, which is implicitely
   taken care by selecting appropriate ecc-scheme

Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent c5957a32

drivers/mtd/nand/omap2.c

+10 −13
Original line number Diff line number Diff line
@@ -1053,7 +1053,7 @@ static int omap_dev_ready(struct mtd_info *mtd) 
 */

static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode)

{

	int nerrors;

	unsigned int bch_type;

	unsigned int dev_width, nsectors;

	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,

						   mtd);
@@ -1062,20 +1062,11 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) 
	u32 val, wr_mode;

	unsigned int ecc_size1, ecc_size0;



	/* Perform ecc calculation on 512-byte sector */

	nsectors = 1;



	/* Update number of error correction */

	nerrors = info->nand.ecc.strength;



	/* Multi sector reading/writing for NAND flash with page size < 4096 */

	if (info->is_elm_used && (mtd->writesize <= 4096)) {

		/* Perform ecc calculation for one page (< 4096) */

		nsectors = info->nand.ecc.steps;

	}

	/* GPMC configurations for calculating ECC */

	switch (ecc_opt) {

	case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:

		bch_type = 0;

		nsectors = 1;

		if (mode == NAND_ECC_READ) {

			wr_mode	  = BCH_WRAPMODE_6;

			ecc_size0 = BCH_ECC_SIZE0;
@@ -1087,6 +1078,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) 
		}

		break;

	case OMAP_ECC_BCH4_CODE_HW:

		bch_type = 0;

		nsectors = chip->ecc.steps;

		if (mode == NAND_ECC_READ) {

			wr_mode	  = BCH_WRAPMODE_1;

			ecc_size0 = BCH4R_ECC_SIZE0;
@@ -1098,6 +1091,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) 
		}

		break;

	case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:

		bch_type = 1;

		nsectors = 1;

		if (mode == NAND_ECC_READ) {

			wr_mode	  = BCH_WRAPMODE_6;

			ecc_size0 = BCH_ECC_SIZE0;
@@ -1109,6 +1104,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) 
		}

		break;

	case OMAP_ECC_BCH8_CODE_HW:

		bch_type = 1;

		nsectors = chip->ecc.steps;

		if (mode == NAND_ECC_READ) {

			wr_mode	  = BCH_WRAPMODE_1;

			ecc_size0 = BCH8R_ECC_SIZE0;
@@ -1133,7 +1130,7 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) 


	/* BCH configuration */

	val = ((1                        << 16) | /* enable BCH */

	       (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */

	       (bch_type		 << 12) | /* BCH4/BCH8/BCH16 */

	       (wr_mode                  <<  8) | /* wrap mode */

	       (dev_width                <<  7) | /* bus width */

	       (((nsectors-1) & 0x7)     <<  4) | /* number of sectors */

CRA Git | Maintained and supported by SUSTech CRA and CCSE