Commit 16e4dd03 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Markup paired operations on wakerefs 



The majority of runtime-pm operations are bounded and scoped within a
function; these are easy to verify that the wakeref are handled
correctly. We can employ the compiler to help us, and reduce the number
of wakerefs tracked when debugging, by passing around cookies provided
by the various rpm_get functions to their rpm_put counterpart. This
makes the pairing explicit, and given the required wakeref cookie the
compiler can verify that we pass an initialised value to the rpm_put
(quite handy for double checking error paths).

For regular builds, the compiler should be able to eliminate the unused
local variables and the program growth should be minimal. Fwiw, it came
out as a net improvement as gcc was able to refactor rpm_get and
rpm_get_if_in_use together,

v2: Just s/rpm_put/rpm_put_unchecked/ everywhere, leaving the manual
mark up for smaller more targeted patches.
v3: Mention the cookie in Returns

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-2-chris@chris-wilson.co.uk
parent bd780f37

drivers/gpu/drm/i915/gvt/aperture_gm.c

+4 −4
Original line number Diff line number Diff line
@@ -180,7 +180,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu) 
	}

	mutex_unlock(&dev_priv->drm.struct_mutex);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

}



static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu) 
	_clear_vgpu_fence(vgpu);



	mutex_unlock(&dev_priv->drm.struct_mutex);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return 0;

out_free_fence:

	gvt_vgpu_err("Failed to alloc fences\n");
@@ -219,7 +219,7 @@ out_free_fence: 
		vgpu->fence.regs[i] = NULL;

	}

	mutex_unlock(&dev_priv->drm.struct_mutex);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return -ENOSPC;

}
@@ -317,7 +317,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu) 


	intel_runtime_pm_get(dev_priv);

	_clear_vgpu_fence(vgpu);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

}



/**

drivers/gpu/drm/i915/gvt/gvt.h

+1 −1
Original line number Diff line number Diff line
@@ -597,7 +597,7 @@ static inline void mmio_hw_access_pre(struct drm_i915_private *dev_priv) 


static inline void mmio_hw_access_post(struct drm_i915_private *dev_priv)

{

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

}



/**

drivers/gpu/drm/i915/gvt/sched_policy.c

+1 −1
Original line number Diff line number Diff line
@@ -474,6 +474,6 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) 
		}

	}

	spin_unlock_bh(&scheduler->mmio_context_lock);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	mutex_unlock(&vgpu->gvt->sched_lock);

}

drivers/gpu/drm/i915/gvt/scheduler.c

+2 −2
Original line number Diff line number Diff line
@@ -997,7 +997,7 @@ complete: 
			intel_uncore_forcewake_put(gvt->dev_priv,

					FORCEWAKE_ALL);



		intel_runtime_pm_put(gvt->dev_priv);

		intel_runtime_pm_put_unchecked(gvt->dev_priv);

		if (ret && (vgpu_is_vm_unhealthy(ret)))

			enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR);

	}
@@ -1451,7 +1451,7 @@ intel_vgpu_create_workload(struct intel_vgpu *vgpu, int ring_id, 
		mutex_lock(&dev_priv->drm.struct_mutex);

		ret = intel_gvt_scan_and_shadow_workload(workload);

		mutex_unlock(&dev_priv->drm.struct_mutex);

		intel_runtime_pm_put(dev_priv);

		intel_runtime_pm_put_unchecked(dev_priv);

	}



	if (ret && (vgpu_is_vm_unhealthy(ret))) {

drivers/gpu/drm/i915/i915_debugfs.c

+27 −27
Original line number Diff line number Diff line
@@ -877,7 +877,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data) 
		}

	}



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -953,7 +953,7 @@ static int i915_gpu_info_open(struct inode *inode, struct file *file) 


	intel_runtime_pm_get(i915);

	gpu = i915_capture_gpu_state(i915);

	intel_runtime_pm_put(i915);

	intel_runtime_pm_put_unchecked(i915);

	if (IS_ERR(gpu))

		return PTR_ERR(gpu);
@@ -1226,7 +1226,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
	seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq);

	seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return ret;

}
@@ -1292,7 +1292,7 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused) 


	intel_engine_get_instdone(dev_priv->engine[RCS], &instdone);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	if (timer_pending(&dev_priv->gpu_error.hangcheck_work.timer))

		seq_printf(m, "Hangcheck active, timer fires in %dms\n",
@@ -1579,7 +1579,7 @@ static int i915_drpc_info(struct seq_file *m, void *unused) 
	else

		err = ironlake_drpc_info(m);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return err;

}
@@ -1632,7 +1632,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) 
	}



	mutex_unlock(&fbc->lock);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -1695,7 +1695,7 @@ static int i915_ips_status(struct seq_file *m, void *unused) 
			seq_puts(m, "Currently: disabled\n");

	}



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -1723,7 +1723,7 @@ static int i915_sr_status(struct seq_file *m, void *unused) 
		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;



	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	seq_printf(m, "self-refresh: %s\n", enableddisabled(sr_enabled));
@@ -1756,7 +1756,7 @@ static int i915_emon_status(struct seq_file *m, void *unused) 
	seq_printf(m, "GFX power: %ld\n", gfx);

	seq_printf(m, "Total power: %ld\n", chipset + gfx);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -1805,7 +1805,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) 
	mutex_unlock(&dev_priv->pcu_lock);



out:

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return ret;

}
@@ -2017,7 +2017,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data) 
	if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)

		seq_puts(m, "L-shaped memory detected\n");



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -2067,7 +2067,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) 
			act_freq = intel_get_cagf(dev_priv,

						  I915_READ(GEN6_RPSTAT1));

		}

		intel_runtime_pm_put(dev_priv);

		intel_runtime_pm_put_unchecked(dev_priv);

	}



	seq_printf(m, "RPS enabled? %d\n", rps->enabled);
@@ -2160,7 +2160,7 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data) 


	intel_runtime_pm_get(dev_priv);

	seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -2192,7 +2192,7 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) 
	for (i = 0; i < 16; i++)

		seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i)));



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -2601,7 +2601,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) 
			   dev_priv->psr.last_exit);

	}



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return 0;

}
@@ -2632,7 +2632,7 @@ retry: 
	drm_modeset_drop_locks(&ctx);

	drm_modeset_acquire_fini(&ctx);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return ret;

}
@@ -2665,7 +2665,7 @@ static int i915_energy_uJ(struct seq_file *m, void *data) 
	intel_runtime_pm_get(dev_priv);



	if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) {

		intel_runtime_pm_put(dev_priv);

		intel_runtime_pm_put_unchecked(dev_priv);

		return -ENODEV;

	}
@@ -2673,7 +2673,7 @@ static int i915_energy_uJ(struct seq_file *m, void *data) 
	power = I915_READ(MCH_SECP_NRG_STTS);

	power = (1000000 * power) >> units; /* convert to uJ */



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	seq_printf(m, "%llu", power);
@@ -2775,7 +2775,7 @@ out: 
	seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE));

	seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL));



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -3114,7 +3114,7 @@ static int i915_display_info(struct seq_file *m, void *unused) 
	drm_connector_list_iter_end(&conn_iter);

	mutex_unlock(&dev->mode_config.mutex);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -3139,7 +3139,7 @@ static int i915_engine_info(struct seq_file *m, void *unused) 
	for_each_engine(engine, dev_priv, id)

		intel_engine_dump(engine, &p, "%s\n", engine->name);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return 0;

}
@@ -3265,7 +3265,7 @@ static ssize_t i915_ipc_status_write(struct file *file, const char __user *ubuf, 
	dev_priv->wm.distrust_bios_wm = true;

	dev_priv->ipc_enabled = enable;

	intel_enable_ipc(dev_priv);

	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	return len;

}
@@ -4090,7 +4090,7 @@ i915_drop_caches_set(void *data, u64 val) 
		i915_gem_drain_freed_objects(i915);



out:

	intel_runtime_pm_put(i915);

	intel_runtime_pm_put_unchecked(i915);



	return ret;

}
@@ -4112,7 +4112,7 @@ i915_cache_sharing_get(void *data, u64 *val) 


	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	*val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
@@ -4140,7 +4140,7 @@ i915_cache_sharing_set(void *data, u64 val) 
	snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);

	I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);

	return 0;

}
@@ -4388,7 +4388,7 @@ static int i915_sseu_status(struct seq_file *m, void *unused) 
		gen10_sseu_device_status(dev_priv, &sseu);

	}



	intel_runtime_pm_put(dev_priv);

	intel_runtime_pm_put_unchecked(dev_priv);



	i915_print_sseu_info(m, false, &sseu);
@@ -4416,7 +4416,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file) 
		return 0;



	intel_uncore_forcewake_user_put(i915);

	intel_runtime_pm_put(i915);

	intel_runtime_pm_put_unchecked(i915);



	return 0;

}

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