Commit 16951b49 authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

arm64: dts: qcom: sm8250: Add TLMM pinctrl node 



Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 4c5a410d

arch/arm64/boot/dts/qcom/sm8250-mtp.dts

+4 −0
Original line number Diff line number Diff line
@@ -359,6 +359,10 @@ 
	status = "okay";

};



&tlmm {

	gpio-reserved-ranges = <28 4>, <40 4>;

};



&uart2 {

	status = "okay";

};

arch/arm64/boot/dts/qcom/sm8250.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -410,6 +410,21 @@ 
			#interrupt-cells = <4>;

		};



		tlmm: pinctrl@f100000 {

			compatible = "qcom,sm8250-pinctrl";

			reg = <0 0x0f100000 0 0x300000>,

			      <0 0x0f500000 0 0x300000>,

			      <0 0x0f900000 0 0x300000>;

			reg-names = "west", "south", "north";

			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			gpio-ranges = <&tlmm 0 0 180>;

			wakeup-parent = <&pdc>;

		};



		intc: interrupt-controller@17a00000 {

			compatible = "arm,gic-v3";

			#interrupt-cells = <3>;

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