arm64: dts: mt8183: add scp node (1652dbf7) · Commits · 戴 / test

arch/arm64/boot/dts/mediatek/mt8183-evb.dts

+11 −0

Original line number	Diff line number	Diff line
		@@ -25,6 +25,17 @@
		chosen {
		stdout-path = "serial0:921600n8";
		};

		reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		scp_mem_reserved: scp_mem_region {
		compatible = "shared-dma-pool";
		reg = <0 0x50000000 0 0x2900000>;
		no-map;
		};
		};
		};

		&auxadc {

+30 −0

Original line number	Diff line number	Diff line
		@@ -90,6 +90,18 @@
		regulator-max-microvolt = <3300000>;
		};

		reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		scp_mem_reserved: scp_mem_region {
		compatible = "shared-dma-pool";
		reg = <0 0x50000000 0 0x2900000>;
		no-map;
		};
		};

		max98357a: codec0 {
		compatible = "maxim,max98357a";
		sdmode-gpios = <&pio 175 0>;
		@@ -524,6 +536,13 @@
		};
		};

		scp_pins: scp {
		pins_scp_uart {
		pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
		<PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
		};
		};

		spi0_pins: spi0 {
		pins_spi{
		pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
		@@ -651,6 +670,17 @@
		};
		};

		&scp {
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <&scp_pins>;

		cros_ec {
		compatible = "google,cros-ec-rpmsg";
		mtk,rpmsg-name = "cros-ec-rpmsg";
		};
		};

		&soc_data {
		status = "okay";
		};

+12 −0

Original line number	Diff line number	Diff line
		@@ -339,6 +339,18 @@
		clock-names = "spi", "wrap";
		};

		scp: scp@10500000 {
		compatible = "mediatek,mt8183-scp";
		reg = <0 0x10500000 0 0x80000>,
		<0 0x105c0000 0 0x19080>;
		reg-names = "sram", "cfg";
		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&infracfg CLK_INFRA_SCPSYS>;
		clock-names = "main";
		memory-region = <&scp_mem_reserved>;
		status = "disabled";
		};

		systimer: timer@10017000 {
		compatible = "mediatek,mt8183-timer",
		"mediatek,mt6765-timer";