dts: socfpga: Add support for Altera's SOCFPGA Arria V board (163a0364) · Commits · 戴 / test

arch/arm/boot/dts/Makefile

+2 −1

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		@@ -211,7 +211,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
		r8a73a4-ape6evm-reference.dtb \
		sh7372-mackerel.dtb
		dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
		dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_socdk.dtb \
		dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
		socfpga_cyclone5_socdk.dtb \
		socfpga_cyclone5_sockit.dtb \
		socfpga_vt.dtb
		dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \

0 → 100644

+58 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright (C) 2013 Altera Corporation <www.altera.com>
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms and conditions of the GNU General Public License,
		* version 2, as published by the Free Software Foundation.
		*
		* This program is distributed in the hope it will be useful, but WITHOUT
		* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
		* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
		* more details.
		*
		* You should have received a copy of the GNU General Public License along with
		* this program. If not, see <http://www.gnu.org/licenses/>.
		*/

		/dts-v1/;
		/include/ "socfpga.dtsi"

		/ {
		soc {
		clkmgr@ffd04000 {
		clocks {
		osc1 {
		clock-frequency = <25000000>;
		};
		};
		};

		serial0@ffc02000 {
		clock-frequency = <100000000>;
		};

		serial1@ffc03000 {
		clock-frequency = <100000000>;
		};

		sysmgr@ffd08000 {
		cpu1-start-addr = <0xffd080c4>;
		};

		timer0@ffc08000 {
		clock-frequency = <100000000>;
		};

		timer1@ffc09000 {
		clock-frequency = <100000000>;
		};

		timer2@ffd00000 {
		clock-frequency = <25000000>;
		};

		timer3@ffd01000 {
		clock-frequency = <25000000>;
		};
		};
		};

0 → 100644

+40 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright (C) 2013 Altera Corporation <www.altera.com>
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License as published by
		* the Free Software Foundation; either version 2 of the License, or
		* (at your option) any later version.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* You should have received a copy of the GNU General Public License
		* along with this program. If not, see <http://www.gnu.org/licenses/>.
		*/

		/include/ "socfpga_arria5.dtsi"

		/ {
		model = "Altera SOCFPGA Arria V SoC Development Kit";
		compatible = "altr,socfpga-arria5", "altr,socfpga";

		chosen {
		bootargs = "console=ttyS0,115200";
		};

		memory {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1GB */
		};

		aliases {
		/* this allow the ethaddr uboot environmnet variable contents
		* to be added to the gmac1 device tree blob.
		*/
		ethernet0 = &gmac1;
		};
		};