PCI: designware-ep: Fix the Header Type check (16270a92) · Commits · 戴 / test

The current check will result in the multiple function device fails to initialize. So fix the check by masking out the multiple function bit. Link: https://lore.kernel.org/r/20200818092746.24366-1-Zhiqiang.Hou@nxp.com Fixes: ("PCI: dwc: Add validation that PCIe core is set to correct mode") Signed-off-by:

Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:

Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by:

Rob Herring <robh@kernel.org>

drivers/pci/controller/dwc/pcie-designware-ep.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -505,7 +505,8 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep)
		u32 reg;
		int i;

		hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE);
		hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) &
		PCI_HEADER_TYPE_MASK;
		if (hdr_type != PCI_HEADER_TYPE_NORMAL) {
		dev_err(pci->dev,
		"PCIe controller is not set to EP mode (hdr_type:0x%x)!\n",

include/uapi/linux/pci_regs.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -76,6 +76,7 @@
		#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
		#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
		#define PCI_HEADER_TYPE 0x0e /* 8 bits */
		#define PCI_HEADER_TYPE_MASK 0x7f
		#define PCI_HEADER_TYPE_NORMAL 0
		#define PCI_HEADER_TYPE_BRIDGE 1
		#define PCI_HEADER_TYPE_CARDBUS 2

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