Commit 15cc4a4a authored by Jisheng Zhang's avatar Jisheng Zhang Committed by David S. Miller
Browse files

net: mvneta: get optional bus clk 



Some platforms may provide more than one clk for the mvneta IP, for
example Marvell BG4CT provides one clk for the mac core, and one
clk for the AXI bus logic. Obviously this bus clk also need to
be enabled. This patch adds this optional "bus" clk support.

Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2804ba4e

drivers/net/ethernet/marvell/mvneta.c

+8 −0
Original line number Diff line number Diff line
@@ -373,6 +373,8 @@ struct mvneta_port { 


	/* Core clock */

	struct clk *clk;

	/* AXI clock */

	struct clk *clk_bus;

	u8 mcast_count[256];

	u16 tx_ring_size;

	u16 rx_ring_size;
@@ -3614,6 +3616,10 @@ static int mvneta_probe(struct platform_device *pdev) 


	clk_prepare_enable(pp->clk);



	pp->clk_bus = devm_clk_get(&pdev->dev, "bus");

	if (!IS_ERR(pp->clk_bus))

		clk_prepare_enable(pp->clk_bus);



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	pp->base = devm_ioremap_resource(&pdev->dev, res);

	if (IS_ERR(pp->base)) {
@@ -3725,6 +3731,7 @@ err_free_stats: 
err_free_ports:

	free_percpu(pp->ports);

err_clk:

	clk_disable_unprepare(pp->clk_bus);

	clk_disable_unprepare(pp->clk);

err_put_phy_node:

	of_node_put(phy_node);
@@ -3742,6 +3749,7 @@ static int mvneta_remove(struct platform_device *pdev) 
	struct mvneta_port *pp = netdev_priv(dev);



	unregister_netdev(dev);

	clk_disable_unprepare(pp->clk_bus);

	clk_disable_unprepare(pp->clk);

	free_percpu(pp->ports);

	free_percpu(pp->stats);

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