Revert "parisc: Revert "Release spinlocks using ordered store"" (157e9afc) · Commits · 戴 / test

arch/parisc/include/asm/spinlock.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -37,8 +37,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *x)
		volatile unsigned int *a;

		a = __ldcw_align(x);
		mb();
		*a = 1;
		/* Release with ordered store. */
		__asm__ __volatile__("stw,ma %0,0(%1)" : : "r"(1), "r"(a) : "memory");
		}

		static inline int arch_spin_trylock(arch_spinlock_t *x)

+4 −8

Original line number	Diff line number	Diff line
		@@ -640,8 +640,7 @@ cas_action:
		sub,<> %r28, %r25, %r0
		2: stw %r24, 0(%r26)
		/* Free lock */
		sync
		stw %r20, 0(%sr2,%r20)
		stw,ma %r20, 0(%sr2,%r20)
		#if ENABLE_LWS_DEBUG
		/* Clear thread register indicator */
		stw %r0, 4(%sr2,%r20)
		@@ -655,8 +654,7 @@ cas_action:
		3:
		/* Error occurred on load or store */
		/* Free lock */
		sync
		stw %r20, 0(%sr2,%r20)
		stw,ma %r20, 0(%sr2,%r20)
		#if ENABLE_LWS_DEBUG
		stw %r0, 4(%sr2,%r20)
		#endif
		@@ -857,8 +855,7 @@ cas2_action:

		cas2_end:
		/* Free lock */
		sync
		stw %r20, 0(%sr2,%r20)
		stw,ma %r20, 0(%sr2,%r20)
		/* Enable interrupts */
		ssm PSW_SM_I, %r0
		/* Return to userspace, set no error */
		@@ -868,8 +865,7 @@ cas2_end:
		22:
		/* Error occurred on load or store */
		/* Free lock */
		sync
		stw %r20, 0(%sr2,%r20)
		stw,ma %r20, 0(%sr2,%r20)
		ssm PSW_SM_I, %r0
		ldo 1(%r0),%r28
		b lws_exit